Mask pattern inspecting method, inspection apparatus,...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

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07114144

ABSTRACT:
A method of inspecting a photomask for a semiconductor integrated circuit formed based on drawing pattern data, includes the steps of classifying a drawing pattern of the semiconductor integrated circuit into a plurality of ranks in accordance with a predetermined reference and extracting the same, determining inspecting accuracy for each of the ranks, and deciding quality of the photomask depending on whether the determined inspecting accuracy is satisfied.

REFERENCES:
patent: 6137901 (2000-10-01), Harazaki
patent: 6801824 (2004-10-01), Ishida et al.
patent: 2004/0133369 (2004-07-01), Pack et al.
patent: 2000-113189 (2000-04-01), None
patent: 2002-196483 (2002-07-01), None
patent: 2002-258463 (2002-09-01), None
patent: 2003-121983 (2003-04-01), None

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