Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-11-08
2005-11-08
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06964031
ABSTRACT:
A mask pattern generation method of generating a mask pattern from a designed pattern, comprising preparing the designed pattern, preparing a correction parameter, preparing a first correction library in which a plurality of pairs of an edge coordinate group and a correction value group to correct the edge coordinate group is registered, acquiring edge coordinate groups of the designed patterns, generating a second correction library in which only the plurality of pairs of an edge coordinate group agreeing with the acquired edge coordinate group and the correction value group is registered in the first correction library and simulation using the correction parameter, and correcting the designed pattern using the second correction library.
REFERENCES:
patent: 5682323 (1997-10-01), Pasch et al.
patent: 5879844 (1999-03-01), Yamamoto et al.
patent: 5991006 (1999-11-01), Tsudaka
patent: 6060368 (2000-05-01), Hashimoto et al.
patent: 6077310 (2000-06-01), Yamamoto et al.
patent: 6175953 (2001-01-01), Scepanovic et al.
patent: 6243855 (2001-06-01), Kobayashi et al.
patent: 6269472 (2001-07-01), Garza et al.
patent: 6425113 (2002-07-01), Anderson et al.
patent: 6523162 (2003-02-01), Agrawal et al.
patent: 6584609 (2003-06-01), Pierrat et al.
patent: 2001/0005566 (2001-06-01), Kotani et al.
patent: 2002/0188925 (2002-12-01), Higashi
patent: 2003/0061592 (2003-03-01), Agrawal et al.
patent: 2003/0115569 (2003-06-01), Ikeuchi
patent: 2003/0126582 (2003-07-01), Kobayashi et al.
patent: 9-319067 (1997-12-01), None
patent: 2001-188336 (2001-07-01), None
patent: 2001-194770 (2001-07-01), None
patent: WO 01/65315 (2001-09-01), None
Newmark et al., “Large Area Optical Proximity Correction using Pattern Based Corrections,” SPIE (1994), 2322:374-386.
Notification For Filing Opinion issued by the Korean Patent Office in a counterpart foreign application with mailing date of Oct. 15, 2004.
Ichiakwa Hirotaka
Inoue Soichi
Kobayashi Sachiko
Kotani Toshiya
Tanaka Satoshi
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Garbowski Leigh M.
Kabushiki Kaisha Toshiba
LandOfFree
Mask pattern generating method and manufacturing method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Mask pattern generating method and manufacturing method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Mask pattern generating method and manufacturing method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3494555