Mask for fabricating semiconductor devices and method for...

Details Mask for fabricating semiconductor devices and method for... Mask for fabricating semiconductor devices and method for...

2005-07-22

2008-10-07

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

Reexamination Certificate

active

07434194

ABSTRACT:
The present method for designing a mask includes calculating the maximum layout number of patterns on a mask substrate, calculating a first mask cost and a second mask cost, calculating the total cost for fabricating a predetermined number of wafers using the first mask and the second mask, and selecting a lower total cost to design the pattern number on a mask substrate. Preferably, the pattern number on the first mask is equal to the maximum layout number, and the pattern number on the second mask is smaller than the maximum layout number. The present mask includes a mask substrate, a first pattern positioned on a first portion of the mask substrate for defining the shape of a first layer on a wafer, and a second pattern positioned on a second portion of the mask substrate for defining the shape of a second layer on the wafer.

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patent: P2002-25800 (2002-01-01), None
patent: P2002-25900 (2002-01-01), None

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