Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
2006-01-03
2006-01-03
Nguyen, Van Thu (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C438S401000, C438S462000, C438S975000
Reexamination Certificate
active
06982495
ABSTRACT:
A mark configuration for the alignment and/or determination of a relative position of at least two planes in relation to one another in a substrate and/or in layers on a substrate during lithographic exposure, in particular, in the case of a wafer during the production of DRAMs, includes a mark structure, and at least one layer of a definable thickness underneath the mark structure for adjusting the physical position of the mark structure relative to a reference plane in or on the substrate. Also provided is a wafer having such a configuration and a process for providing such a configuration. The invention allows a mark configuration to have mark structures exhibiting good contrast regardless of the design or the process conditions.
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Fröhlich Hans-Georg
Götschkes Udo
Hübinger Frank
Kowalewski Johannes
Krause Gerd
Menz Douglas
Nguyen Van Thu
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