Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1999-09-22
2002-12-17
Hudspeth, David (Department: 2651)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S134000, C711S203000
Reexamination Certificate
active
06496901
ABSTRACT:
TECHNICAL FIELD
The present invention relates to the mapping of variable size data blocks into a fixed block structure for emulating a tape device with a direct access storage device.
BACKGROUND ART
Emulation of a tape device necessitates the handling of large blocks of data differently than that required for a direct access storage device (DASD) control unit. In a DASD environment, a data-record never exceeds a total data count greater than some finite amount of bytes such as, for example, 64 kilobytes. Tape blocks, on the other hand, may have lengths longer than the finite length that is allowed in a DASD environment, and as such, may exceed the capabilities of the DASD front-end data path counters. For example, for a finite block length of 64 kilobytes, a 16 bit counter may be used. As such, tape blocks, which may be up to, for example 256 kilobytes in length, exceed the capabilities of the 16 bit counter.
For the foregoing reasons, there is a need for a virtual tape system and method for mapping variable size data blocks into a fixed block structure.
DISCLOSURE OF INVENTION
It is, therefore, an object of the present invention to provide a virtual tape system and method for mapping variable sized data blocks from a host into a fixed sized data block structure of a direct access storage device that utilizes a buffer between the cache and the host.
In carrying out the above object, a virtual tape system is provided. The system comprises a cache, a buffer, and control logic. The cache for the direct access storage device is configured to send and receive data in a group of associated (spanned) chunks having a fixed size. The buffer is for transferring data between the cache and the host. The buffer has a size that is greater than the fixed chunk size. The control logic is operative to access the storage device by transferring data between the cache and the buffer in fixed size chunks, and in parallel, transferring data between the host and the buffer in data-chained blocks having a variable size.
In one embodiment, the fixed chunk size is not greater than 64 kilobytes, and the variable block size is not greater than 256 kilobytes. A 16 bit counter is used for counting data transfers between the cache and the buffer. Further, it is preferred that the buffer size is twice the sum of the fixed chunk size and the cyclic redundancy check (CRC) bytes.
In a preferred embodiment, each fixed size chunk has a count, and the control logic is further operative to read from the direct access storage device by initiating a transfer of a series of fixed size chunks from the cache to the buffer. Thereafter, the control logic initiates a transfer of a series of variable size blocks from the buffer to the host while, in parallel, continuing to transfer the series of fixed size chunks from the cache to the buffer. The last chunk in the series of fixed size chunks may have a count less than the fixed chunk size, with the other chunks all having a count equal to the fixed chunk size.
Further, in a preferred embodiment, the control logic is further operative to write to the direct access storage device by initiating a transfer of a series of variable size blocks from the host to the buffer. Thereafter, the control logic initiates a transfer of a series of fixed size chunks from the buffer to the cache while, in parallel, continuing to transfer the series of variable size blocks from the host to the buffer. The last chunk in the series of fixed size chunks may have a count less than the fixed chunk size, with the other chunks having a count equal to the fixed chunk size. Preferably, the buffer size is at least twice the fixed chunk size including room for CRC bytes. Having the buffer at least twice the chunk size (plus room for CRC bytes) allows the buffer to be primed with one full chunk of information before any information is removed from the buffer. This size buffer advantageously allows simultaneous (parallel) transfers into and out of the buffer in either direction (read or write).
Further, in carrying out the present invention, a virtual tape method for mapping variable size data blocks from a host into a fixed data block structure of a direct access storage device is provided. The direct access storage device has a cache configured to send and receive data in a group of associated (spanned) chunks having a fixed size. The method comprises establishing a buffer between the cache and the host for transferring data between the cache and host. The buffer has a size that is greater than the fixed chunk size. The method further comprises accessing the storage device by transferring data between the cache and the buffer in fixed size chunks, and in parallel, transferring data between the host and the buffer in data-chained blocks having a variable size. In one embodiment, the fixed chunk size is not greater than 64 kilobytes and the variable chunk size is not greater than 256 kilobytes.
In a preferred embodiment, the method further comprises reading from the direct access storage device by initiating a transfer of a series of fixed size chunks from the cache to the buffer. Thereafter, a transfer of a series of variable size blocks from the buffer to the host is initiated while, in parallel, the transferring of the series of fixed size chunks from the cache to the buffer continues. The last chunk in the series of fixed size chunks may have a count less than the fixed chunk size, with the other chunks all having a count equal to the fixed chunk size. Further, in a preferred embodiment, the method further comprises writing to the direct access storage device by initiating a transfer of a series of variable sized blocks from the host to the buffer. Thereafter, a transfer of a series of fixed sized chunks from the buffer to the cache is initiated while, in parallel, the transferring of the series of variable size blocks from the host to the buffer continues.
The advantages associated with embodiments of the present invention are numerous. For example, embodiments of the present invention employ a chunking algorithm to map arbitrarily large data blocks of variable size into a fixed block structure. Two data transfer modes, fixed chunk size and variable block size (data-chained), are used in parallel to reconcile the count mismatch between the fixed size chunks and the variable size blocks. For write transfers, commands with the data chaining bit set and any write command with a count greater than the defined chunk size is processed by the chunking algorithm. Read transfers are processed as chunks when instructed to do so by the control unit processor via messaging.
The above object and other objects, features, and advantages of the present invention are readily apparent from the following detailed description of the best mode for carrying out the invention when taken in connection with the accompanying drawings.
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High Performance Cooperative Count Key Data/Fixed Block Conversion Mechanism; IBM Technical Disclosure Bulletin, US, IBM Corp., New York, vol. 38, No. 6, Jun. 1, 1995, pp. 333-335.
De Martine Patrick Albert Lloyd
Hammett Scott Cary
Zanowick Stephen Samuel
Brooks & Kushman P.C.
Hudspeth David
Storage Technology Corporation
Tzeng Fred F.
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