Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2011-08-16
2011-08-16
Yu, Jae U (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S202000, C711S206000, C712S200000, C713S002000
Reexamination Certificate
active
08001359
ABSTRACT:
Embodiments of the present invention provide a system that maps an N-bit application to virtual memory. The N-bit application may be obtained by porting an M-bit application to an N-bit architecture where N is greater than M. During operation, the system receives a request to map an N-bit application to a computer's virtual memory. The system then maps the N-bit application to a section of virtual memory which begins at a memory address that is greater than or equal to 2M. If the N-bit application accesses a memory address which is less than 2M, the system can generate a trap, thereby facilitating the discovery of M-bit memory references in the N-bit application.
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Peak Christopher G.
Scheinberg Martin
Sokol, Jr. Joseph
Apple Inc.
Park Vaughan Fleming & Dowler LLP
Sahasrabuddhe Laxman
Yu Jae U
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