Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-09-12
2006-09-12
Kerveros, James C. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
07107508
ABSTRACT:
A fault-tolerant magnetoresistive solid-state storage device (MRAM) in use performs error correction coding and decoding of stored information, to tolerate physical failures. At manufacture, the device is tested to confirm that each set of storage cells is suitable for storing ECC encoded data. The test comprises identifying failed cells where the failures will be visible in use for the generation of erasure information used in ECC decoding, by comparing parametric values obtained from the cells against one or more failure ranges, and includes performing a write-read-compare operation with test data to identify failed cells which will be hidden for the generation of erasure information in use. A failure count is formed based on both the visible failures and the hidden failures, to determine that the set of cells is suitable for storing ECC encoded data. The failure count is weighted, with hidden failures having a greater weighting than visible failures.
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Davis James Andrew
Jedwab Jonathan
Paterson Kenneth Graham
Seroussi Gadiel
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