Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2006-06-16
2009-12-22
Menz, Douglas M (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S409000
Reexamination Certificate
active
07635615
ABSTRACT:
Transistor type semiconducting device comprising:a substrate,an insulating layer comprising sidewalls formed on each part of the source zone and the drain zone,drain, channel and source zones, the channel zone being formed on the insulating layer and being strained by the drain and the source zones, between the side parts,a grid, separated from the channel by a grid insulator.
REFERENCES:
patent: 4104090 (1978-08-01), Pogge
patent: 5637515 (1997-06-01), Takemura
patent: 6287936 (2001-09-01), Perea et al.
patent: 6717217 (2004-04-01), Fogel et al.
patent: 6989570 (2006-01-01), Skotnicki et al.
patent: 2003/0080361 (2003-05-01), Murthy et al.
patent: 2004/0031979 (2004-02-01), Lochtefeld et al.
patent: 2004/0217430 (2004-11-01), Chu
patent: 2005/0090066 (2005-04-01), Zhu et al.
patent: 1 178 532 (2002-02-01), None
patent: 1 487 007 (2004-12-01), None
patent: 2 838 237 (2002-04-01), None
patent: WO 2004/073043 (2004-08-01), None
Rapport De Recherche Preliminaire, Jan. 19, 2006, France.
L. Canham, Properties of Porous Silicon, EMIS Datareviews Series No. 18, pp. 12-22.
Barbe Jean-Charles
Barraud Sylvian
Fenouillet-Beranger Claire
Gallon Claire
Halimaoui Aomar
Commissariat A l'Energie Atomique
Menz Douglas M
Nixon & Peabody LLP
LandOfFree
Manufacturing processing for an isolated transistor with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Manufacturing processing for an isolated transistor with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacturing processing for an isolated transistor with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4149605