Manufacturing process and structure for embedded...

Details Manufacturing process and structure for embedded... Manufacturing process and structure for embedded...

2008-04-10

2010-11-02

Williams, Alexander O (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

On insulating carrier other than a printed circuit board

C257SE23173, C257S700000, C257S686000, C257S685000, C257S777000, C257S774000, C257S773000, C257S680000, C257S723000

Reexamination Certificate

active

07825500

ABSTRACT:
A manufacturing process for an embedded semiconductor device is provided. In the manufacturing process, at least one insulation layer and a substrate are stacked to each other, and a third metal layer is laminated on the insulation layer to embed a semiconductor device in the insulation layer. The substrate has a base, a first circuit layer, a second circuit layer, and at least a first conductive structure passing through the base and electrically connected to the first circuit layer and the second circuit layer. In addition, the third metal layer is patterned to form a third circuit layer having a plurality of third pads.

REFERENCES:
patent: 7190592 (2007-03-01), Hu
patent: 7498205 (2009-03-01), Jung et al.
patent: 2004/0145874 (2004-07-01), Pinel et al.
patent: 2007/0074900 (2007-04-01), Lee et al.
patent: 2007/0138630 (2007-06-01), Wang et al.
patent: 2007/0145577 (2007-06-01), Zeng et al.
patent: 2008/0216296 (2008-09-01), Prymak et al.
patent: 2009/0188703 (2009-07-01), Ito et al.

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