Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-09-13
2005-09-13
Vu, Hung (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S627000, C438S628000, C438S643000, C438S653000, C438S675000, C438S687000
Reexamination Certificate
active
06943101
ABSTRACT:
A method for fabricating an interconnect on a surface of a passivated substrate includes applying a diffusion barrier to the surface of the passivated substrate and applying a mask to the diffusion barrier. The mask is then patterned to provide an opening for the interconnect. The interconnect is deposited in the opening and the mask is removed. Those portions of the diffusion barrier that are not covered by the interconnect are also removed. The interconnect and what is left of the diffusion barrier are then encapsulated by metal-selective wet-chemical dip coating.
REFERENCES:
patent: 5071518 (1991-12-01), Pan
patent: 6403457 (2002-06-01), Tandy
patent: 2001/0040290 (2001-11-01), Sakurai et al.
patent: 4235919 (1992-10-01), None
patent: 1003209 (2000-05-01), None
Baker et al., “Immersion Gold as a Sensitizer for Electroless Gold Plating”, IBM Technical Disclosure Bulletin, vol. 15, No. 4, Sep. 1972.
Fish & Richardson P.C.
Infineon - Technologies AG
Vu Hung
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