Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having air-gap dielectric
Reexamination Certificate
1999-10-27
2001-05-08
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having air-gap dielectric
C257S714000
Reexamination Certificate
active
06228744
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor or other applicable substrate having micro pipes and a method for forming thereof, and more particularly, to a semiconductor structure or other suitable substrate with single or multi layers of micro pipes and a method of forming thereof
2. Discussion of the Prior Art
Chip manufacturing often requires etching trenches in various material. After trench etching, the trenches may be filled with a desirable material. In chip fabrication processes that involve filling trenches, voids are sometimes formed in the material that fills the trenches. The voids are generally considered defects.
SUMMARY OF THE INVENTION
The invention utilizes the voids in a positive manner to create controlled micro channel structures, either in a semiconductor device, or any other applicable substrate. The inventive micro pipe system, which can be interconnected using vias, can be used for cooling substrates or semiconductor devices. Alternatively, the micro pipes can be used as channels for fluid control and movement.
The object of the present invention is to provide a semiconductor or other suitable substrate having single or multi layers of micro pipes and a method for forming thereof.
Another object of the present invention is to form controlled voids that act as micro pipes.
Yet another object of the present invention is to provide a structure used for several applications, such as internal cooling of semiconductor devices.
Instead of eliminating voids in material used to fill trenches, the voids are controlled to form micro pipes. This is achieved by controlling the aspect ratio of the trenches and subsequent deposition characteristics. In one embodiment, a method of forming a micro pipe comprises the steps of forming a trench in a first layer of the semiconductor device, or other suitable substrate; and forming a second layer over the first layer The trench has a height which is larger than a width thereof so that the second layer lines sidewalls and bottom of the trench, and covers the top of the trench to form the micro pipe within the trench.
Illustratively, the trench is formed by reactive ion etching, and the second layer is formed by chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD).
Yet another embodiment includes forming in the second layer a via hole that reaches the micro pipe. The second layer may be planarized by chemical mechanical polish or reactive ion etching prior to via hole formation. In another embodiment, using the via holes, a third layer is formed on inner surfaces of the micro pipe, by CVD for example.
A further embodiment includes forming a third layer on the second layer; forming another trench in the third layer; and forming a fourth layer on the third layer. The fourth layer has another micro pipe in the other trench formed in the third layer. The fourth layer may include a via hole that reaches the other micro pipe formed in the fourth layer. Another via hole formed through the second, third, and fourth layers reaches the micro pipes in the second and fourth layers. Illustratively, the other micro pipe in the fourth layer is perpendicular to the micro pipe in the second layer. Alternatively, the trench of the second micro pipe system may be formed in the second layer if it is thick enough. In this case, it is in the third layer, rather than in the fourth layer, where the second set of micro pipes are formed.
One or a series of micro pipes may be formed in a single layer. Alternatively, a multi layer network of micro pipes may be formed. Micro pipes of different levels may be interconnected as desired using via holes. One or more via holes may be etched to contact a micro pipe at any desired location, and to interconnect micro pipes of different levels.
The inventive method is cost effective and may be used to cool a microchip, or other substrates, by circulating a cooling fluid in the micro pipes.
In another embodiment, the micro pipes are lined with a desired material. In the case where the lining material is conductive, the pipes may be used as micro light pipe channels or buried conducting pipes. The lining of the pipes is achieved using CVD, for example. Access to line the micro pipes may be gained from the via holes. Alternatively, the micro pipes may be accessed from their sides, which are exposed after cutting the substrate into individual devices
The micro pipe forming steps may be repeated to form as many desired layers of micro pipes. In addition, the micro pipe liner forming step may be repeated using different material to form a composite liner lining the inner surface of the micro pipe.
In yet another embodiment of the present invention, a semiconductor device or other suitable substrate comprises a first layer having a trench; and a second layer formed over the first layer, where the trench has a height which is larger than a width thereof, so that the second layer lines sidewalls and bottom of the trench and covers a top of the trench to form a micro pipe within the trench. The semiconductor device may have multi layers, each having one or a series of micro pipes therein. The inner surfaces of the micro pipes may be lined with a desired material, which may be conductive for example. Via holes in the various layers interconnect the micro pipes of different layers, or provides access to the micro pipes.
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Levine Ernest Norman
Lofaro Michael Francis
Ryan James Gardner
Elms Richard
International Business Machines - Corporation
Scully Scott Murphy & Presser
Townsend, Esq. Tiffany L.
Wilson Christian D.
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