Manufacturing method of wiring substrate and semiconductor...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S660000, C438S669000, C438S676000, C257SE21533, C257SE21534, C257SE21535, C257SE21582

Reexamination Certificate

active

07494923

ABSTRACT:
The present invention provides a method for forming a wiring having a minute shape on a large substrate with a small number of steps, and further a wiring substrate formed by the method. Moreover, the present invention provides a semiconductor device in which cost reduction and throughput improvement are possible due to the small number of steps and reduction of materials and which has a semiconductor element with a minute structure, and further a manufacturing method thereof. According to the present invention, a composition including metal particles and organic resin is irradiated with laser light and a part of the metal particles is baked to form a conductive layer typified by a wiring, an electrode or the like over a substrate. Further, a semiconductor device having the baked conductive layer as a wiring or an electrode is formed.

REFERENCES:
patent: 4496607 (1985-01-01), Mathias
patent: 4685033 (1987-08-01), Inoue
patent: 4931323 (1990-06-01), Manitt et al.
patent: 5132248 (1992-07-01), Drummond et al.
patent: 5512514 (1996-04-01), Lee
patent: 5652042 (1997-07-01), Kawakita et al.
patent: 5822856 (1998-10-01), Bhatt et al.
patent: 6294401 (2001-09-01), Jacobson et al.
patent: 6313435 (2001-11-01), Shoemaker et al.
patent: 6362507 (2002-03-01), Ogawa et al.
patent: 6416583 (2002-07-01), Kitano et al.
patent: 6503831 (2003-01-01), Speakman
patent: 6514801 (2003-02-01), Yudasaka et al.
patent: 6627263 (2003-09-01), Kitano et al.
patent: 6630274 (2003-10-01), Kiguchi et al.
patent: 6713389 (2004-03-01), Speakman
patent: 6715871 (2004-04-01), Hashimoto et al.
patent: 6794220 (2004-09-01), Hirai et al.
patent: 6810814 (2004-11-01), Hasei
patent: 6849109 (2005-02-01), Yadav et al.
patent: 6953951 (2005-10-01), Yamazaki et al.
patent: 6957608 (2005-10-01), Hubert et al.
patent: 6992001 (2006-01-01), Lin
patent: 7061570 (2006-06-01), Imai
patent: 7183146 (2007-02-01), Yamazaki et al.
patent: 7288420 (2007-10-01), Yamazaki et al.
patent: 2001/0045974 (2001-11-01), Shoemaker et al.
patent: 2002/0070382 (2002-06-01), Yamazaki et al.
patent: 2002/0136829 (2002-09-01), Kitano et al.
patent: 2003/0030689 (2003-02-01), Hashimoto et al.
patent: 2003/0054653 (2003-03-01), Yamazaki et al.
patent: 2003/0059987 (2003-03-01), Sirringhaus et al.
patent: 2003/0083203 (2003-05-01), Hashimoto et al.
patent: 2004/0083446 (2004-04-01), Hasei
patent: 2004/0147066 (2004-07-01), Yamazaki et al.
patent: 2004/0147113 (2004-07-01), Yamazaki et al.
patent: 2004/0207800 (2004-10-01), Hiruma et al.
patent: 2004/0212645 (2004-10-01), Usuda
patent: 2004/0253835 (2004-12-01), Kawase
patent: 2005/0008880 (2005-01-01), Kunze et al.
patent: 2005/0014319 (2005-01-01), Yamazaki et al.
patent: 2005/0022374 (2005-02-01), Hirai et al.
patent: 2005/0043186 (2005-02-01), Maekawa et al.
patent: 2005/0095356 (2005-05-01), Nakamura et al.
patent: 2005/0112906 (2005-05-01), Maekawa et al.
patent: 2005/0142896 (2005-06-01), Imai et al.
patent: 2005/0161783 (2005-07-01), Hashimoto
patent: 2005/0239365 (2005-10-01), Hiraoka
patent: 2005/0253524 (2005-11-01), Ishida
patent: 2005/0276912 (2005-12-01), Yamamoto et al.
patent: 2006/0068080 (2006-03-01), Yadav et al.
patent: 2006/0158482 (2006-07-01), Nakamura et al.
patent: 2006/0165546 (2006-07-01), Yamada et al.
patent: 2006/0211187 (2006-09-01), Choi et al.
patent: 2007/0093002 (2007-04-01), Maekawa et al.
patent: 2007/0181945 (2007-08-01), Nakamura
patent: 2008/0042212 (2008-02-01), Kamath et al.
patent: 1087428 (2001-03-01), None
patent: 01089589 (1989-04-01), None
patent: 5-338187 (1993-12-01), None
patent: 05-338187 (1993-12-01), None
patent: 6-182980 (1994-07-01), None
patent: 6-237063 (1994-08-01), None
patent: 08-062445 (1996-03-01), None
patent: 10-270843 (1998-10-01), None
patent: 2000-188251 (2000-07-01), None
patent: 2001-179167 (2001-07-01), None
patent: 2002-324966 (2002-11-01), None
patent: 2002-359246 (2002-12-01), None
patent: 2004-055363 (2004-02-01), None
patent: 2004281738 (2004-10-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Manufacturing method of wiring substrate and semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Manufacturing method of wiring substrate and semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacturing method of wiring substrate and semiconductor... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4076420

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.