Manufacturing method of thin film transistor having altered...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S719000, C438S734000, C257SE21414

Reexamination Certificate

active

07998801

ABSTRACT:
Decrease of the off-state current, increase of the on-state current, and reduction of variations of electrical characteristics. A method for manufacturing a channel-etched inversed staggered thin film transistor includes the following steps: removing, by first dry-etching, a part of a semiconductor layer including an impurity element which imparts one conductivity type, which is exposed from the source and drain electrodes, and partially a part of an amorphous semiconductor layer just below and in contact with the part of the semiconductor layer; removing, by second dry-etching, partially the part of the amorphous semiconductor layer which is exposed by the first dry-etching; and performing plasma treatment on the surface of the part of the amorphous semiconductor layer which is exposed by the second dry-etching so that an altered layer is formed.

REFERENCES:
patent: 4409134 (1983-10-01), Yamazaki
patent: 5101242 (1992-03-01), Ikeda et al.
patent: 5221631 (1993-06-01), Ikeda et al.
patent: 5453858 (1995-09-01), Yamazaki
patent: 5514879 (1996-05-01), Yamazaki
patent: 5591987 (1997-01-01), Yamazaki et al.
patent: 5614732 (1997-03-01), Yamazaki
patent: 5648662 (1997-07-01), Zhang et al.
patent: 5677236 (1997-10-01), Saitoh et al.
patent: 5701167 (1997-12-01), Yamazaki
patent: 5766989 (1998-06-01), Maegawa et al.
patent: 5849601 (1998-12-01), Yamazaki
patent: 5859445 (1999-01-01), Yamazaki
patent: 5864150 (1999-01-01), Lin
patent: 5932302 (1999-08-01), Yamazaki et al.
patent: 6011277 (2000-01-01), Yamazaki
patent: 6023075 (2000-02-01), Yamazaki
patent: 6121162 (2000-09-01), Endo
patent: 6133162 (2000-10-01), Suzuki et al.
patent: 6153893 (2000-11-01), Inoue et al.
patent: 6171674 (2001-01-01), Yamazaki et al.
patent: 6183816 (2001-02-01), Yamazaki et al.
patent: 6252249 (2001-06-01), Yamazaki
patent: 6281520 (2001-08-01), Yamazaki
patent: 6291366 (2001-09-01), Sano et al.
patent: 6306213 (2001-10-01), Yamazaki
patent: 6420276 (2002-07-01), Oku et al.
patent: 6458715 (2002-10-01), Sano et al.
patent: 6468617 (2002-10-01), Yamazaki et al.
patent: 6468839 (2002-10-01), Inoue et al.
patent: 6500752 (2002-12-01), Oku et al.
patent: 6646327 (2003-11-01), Oku et al.
patent: 6737676 (2004-05-01), Yamazaki
patent: 6756258 (2004-06-01), Zhang et al.
patent: 6759283 (2004-07-01), Yasuda et al.
patent: 6835523 (2004-12-01), Yamazaki et al.
patent: 6835669 (2004-12-01), Oku et al.
patent: 7067844 (2006-06-01), Yamazaki
patent: 7098479 (2006-08-01), Yamazaki
patent: 7115902 (2006-10-01), Yamazaki
patent: 7161212 (2007-01-01), Ohishi et al.
patent: 7199846 (2007-04-01), Lim
patent: 7410818 (2008-08-01), Ohishi et al.
patent: 2003/0189232 (2003-10-01), Law et al.
patent: 2004/0198046 (2004-10-01), Yu-Chou et al.
patent: 2004/0235224 (2004-11-01), Lin et al.
patent: 2005/0022864 (2005-02-01), Fujioka et al.
patent: 2006/0019433 (2006-01-01), Chen
patent: 2010/0096637 (2010-04-01), Yamazaki et al.
patent: 0 535 979 (1993-04-01), None
patent: 1 505 174 (2005-02-01), None
patent: 55-163848 (1980-12-01), None
patent: 57-071126 (1982-05-01), None
patent: 58-042239 (1983-03-01), None
patent: 58-092217 (1983-06-01), None
patent: 62-062073 (1987-12-01), None
patent: 01-144682 (1989-06-01), None
patent: 02-053941 (1990-11-01), None
patent: 02-053941 (1990-11-01), None
patent: 04-242724 (1992-08-01), None
patent: 06-326312 (1994-11-01), None
patent: 08-055858 (1996-02-01), None
patent: 10-163195 (1998-06-01), None
patent: 11-274504 (1999-10-01), None
patent: 2000-277439 (2000-10-01), None
patent: 2001-007024 (2001-01-01), None
patent: 2002-110992 (2002-04-01), None
patent: 2002-164346 (2002-06-01), None
patent: 2003-037270 (2003-02-01), None
patent: 2003-332313 (2003-11-01), None
patent: 2004-014958 (2004-01-01), None
patent: 2005-049832 (2005-02-01), None
patent: 2005-167051 (2005-06-01), None
patent: 2005-228826 (2005-08-01), None
patent: 2008-021722 (2008-01-01), None
Arai et al., 41.2: Micro Silicon Technology for Active Matrix OLED Display, SID Digest '07 : SID International Symposium Digest of Technical Papers, vol. XXXVII , pp. 1370-1373, 2007.
Kim et al, 42.1: A Novel Four-Mask-Count Process Architecture for TFT-LCDS, SID Digest '00 : SID International Symposium Digest of Technical Papers, pp. 1006-1009, 2000.
Song et al., 34.1: Advanced Four-Mask Process Architecture for the A-SI TFT Array Manufacturing Method, SID Digest '02 : SID International Symposium Digest of Technical Papers, pp. 1038-1041, 2002.
Choi et al., P-16: Novel Four-Mask Process in the FFS TFT-LCD With Optimum Multiple-Slit Design Applied by the Use of a Gray-Tone Mask, SID Digest '05 : SID International Symposium Digest of Technical Papers, pp. 284-287, 2005.
Lee et al., How to Achieve High Mobility Thin Film Transistors by Direct Deposition of Silicon Using 13.56 MHz RF PECVD?, Int. Electron Devices Meeting Tech. Digest, p. 295-298, 2006.
Czhang et al., Directly Deposited Nanocrystalline Silicon Thin-Film Transistors With Ultra High Mobilities, Appl. Phys. Lett., 89, pp. 252101-1-252101-3, 2006.
Fujiwara et al., Real-time spectroscopic ellipsometry studies of the nucleation and grain growth processes in microcrystalline silicon thin films, Phys. Rev. B, 63, pp. 115306-1-115306-9, 2001.
Fujiwara et al., Microcrystalline silicon nucleation sites in the sub-surface of hydrogenated amorphous silicon, Sur. Sci., 497, pp. 333-340, 2002.
Fujiwara et al., Stress-Induced Nucleation of Microcrystalline Silicon From Amorphous Phase, Jpn. J. Appl. Phys., vol. 41/Part1, No. 5A, pp. 2821-2828, 2002.
Kamei et al., A Significant Reduction of Impurity Contents in Hydrogenated Microcrystalline Silicon Films for Increased Grain Size and Reduced Defect Density, Jpn. J. Appl. Phys., vol. 37/Part2, No. 3A, pp. L265-L268, 1998.

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