Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2009-04-16
2011-11-08
Richards, N Drew (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S151000, C257S066000, C257S071000, C257S072000
Reexamination Certificate
active
08053294
ABSTRACT:
It is an object to control quality of a microcrystalline semiconductor film or a semiconductor film including crystal grains so that operation characteristics of a semiconductor element typified by a TFT can be improved. It is another object to improve characteristics of a semiconductor element typified by a TFT by controlling a deposition process of a microcrystalline semiconductor film or a semiconductor film including crystal grains. In addition, it is another object to increase on-state current of a thin film transistor and to reduce off-state current of the thin film transistor. In a semiconductor layer including a plurality of crystalline regions in an amorphous structure, generation positions and generation density of crystal nuclei from which the crystalline regions start to grow are controlled, whereby quality of the semiconductor layer is controlled. In addition, after generation of crystal nuclei from which the crystalline regions start to grow in the semiconductor layer, an impurity element serving as a donor is added to the semiconductor layer, whereby crystallinity of the semiconductor layer is increased and the resistivity of the semiconductor layer is reduced.
REFERENCES:
patent: 4409134 (1983-10-01), Yamazaki
patent: 5101242 (1992-03-01), Ikeda et al.
patent: 5221631 (1993-06-01), Ikeda et al.
patent: 5311040 (1994-05-01), Hiramatsu et al.
patent: 5453858 (1995-09-01), Yamazaki
patent: 5514879 (1996-05-01), Yamazaki
patent: 5591987 (1997-01-01), Yamazaki et al.
patent: 5614732 (1997-03-01), Yamazaki
patent: 5648662 (1997-07-01), Zhang et al.
patent: 5677236 (1997-10-01), Saitoh et al.
patent: 5701167 (1997-12-01), Yamazaki
patent: 5766989 (1998-06-01), Maegawa et al.
patent: 5849601 (1998-12-01), Yamazaki
patent: 5859445 (1999-01-01), Yamazaki
patent: 5864150 (1999-01-01), Lin
patent: 5932302 (1999-08-01), Yamazaki et al.
patent: 6011277 (2000-01-01), Yamazaki
patent: 6023075 (2000-02-01), Yamazaki
patent: 6153893 (2000-11-01), Inoue et al.
patent: 6171674 (2001-01-01), Yamazaki et al.
patent: 6183816 (2001-02-01), Yamazaki et al.
patent: 6252249 (2001-06-01), Yamazaki
patent: 6281520 (2001-08-01), Yamazaki
patent: 6306213 (2001-10-01), Yamazaki
patent: 6410372 (2002-06-01), Flewitt
patent: 6468617 (2002-10-01), Yamazaki et al.
patent: 6468839 (2002-10-01), Inoue et al.
patent: 6483124 (2002-11-01), Flewitt
patent: 6737676 (2004-05-01), Yamazaki
patent: 6756258 (2004-06-01), Zhang et al.
patent: 6835523 (2004-12-01), Yamazaki et al.
patent: 7067844 (2006-06-01), Yamazaki
patent: 7098479 (2006-08-01), Yamazaki
patent: 7115902 (2006-10-01), Yamazaki
patent: 7199846 (2007-04-01), Lim
patent: 2001/0019154 (2001-09-01), Yamazaki et al.
patent: 2002/0009819 (2002-01-01), Flewitt
patent: 2005/0014319 (2005-01-01), Yamazaki et al.
patent: 2005/0022864 (2005-02-01), Fujioka et al.
patent: 2005/0085003 (2005-04-01), Kishimoto et al.
patent: 2005/0214455 (2005-09-01), Li et al.
patent: 2007/0295399 (2007-12-01), Carlson
patent: 2009/0242889 (2009-10-01), Nakayama
patent: 2009/0261328 (2009-10-01), Miyairi et al.
patent: 2010/0096631 (2010-04-01), Miyairi et al.
patent: 2010/0099217 (2010-04-01), Isa et al.
patent: 0 449 539 (1991-10-01), None
patent: 0 535 979 (1993-04-01), None
patent: 1 505 174 (2005-02-01), None
patent: 57-071126 (1982-05-01), None
patent: 58-092217 (1983-06-01), None
patent: 62-062073 (1987-03-01), None
patent: 62-062073 (1987-12-01), None
patent: 01-144682 (1989-06-01), None
patent: 02-001174 (1990-01-01), None
patent: 02-053941 (1990-02-01), None
patent: 02-053941 (1990-11-01), None
patent: 04-242724 (1992-08-01), None
patent: 05-102454 (1993-04-01), None
patent: 06-326312 (1994-11-01), None
patent: 2000-277439 (2000-10-01), None
patent: 2001-007024 (2001-01-01), None
patent: 2004-014958 (2004-01-01), None
patent: 2005-049832 (2005-02-01), None
patent: 2005-167051 (2005-06-01), None
patent: 2005-322845 (2005-11-01), None
patent: WO 02/07207 (2002-01-01), None
Ehara et al., “Nitrogen-Doping Effects on Electrical Properties of Hydrogenated Microcrystalline Silicon as Studied by Electron Paramagnetic Resonance and Conductivity”, 2000, Jpn. J. Appl. Phys. vol. 39, pp. 31-34.
Arai et al., 41.2: Micro Silicon Technology for Active Matrix OLED Display, SID Digest '07 : SID International Symposium Digest of Technical Papers, vol. XXXVIII , pp. 1370-1373, 2007.
Kim et al, 42.1: A Novel Four-Mask-Count Process Architecture for TFT-LCDS, SID Digest '00 : SID International Symposium Digest of Technical Papers, pp. 1006-1009, 2000.
Song et al., 34.1: Advanced Four-Mask Process Architecture for the A-SI TFT Array Manufacturing Method, SID Digest '02 : SID International Symposium Digest of Technical Papers, pp. 1038-1041, 2002.
Choi et al., P-16: Novel Four-Mask Process in the FFS TFT-LCD With Optimum Multiple-Slit Design Applied by the Use of a Gray-Tone Mask, SID Digest '05 : SID International Symposium Digest of Technical Papers, pp. 284-287, 2005.
Fujiwara et al., Stress-Induced Nucleation of Microcrystalline Silicon From Amorphous Phase, Jpn. J. Appl. Phys., 41/Part1, 2821-2828, 2002.
Kamei et al., A Significant Reduction of Impurity Contents in Hydrogenated Microcrystalline Silicon Films for Increased Grain Size and Reduced Defect Density, Jpn. J. Appl. Phys., 37/Part2, L265-L268, 1998.
Lee et al., How to Achieve High Mobility Thin Film Transistors by Direct Deposition of Silicon Using 13.56 MHz RF PECVD?, Int. Electron Devices Meeting Tech. Digest, p. 295-298, 2006.
Czhang et al., Directly Deposited Nanocrystalline Silicon Thin-Film Transistors With Ultra High Mobilities, Appl. Phys. Lett., 89, pp. 252101-1-252101-3, 2006.
Fujiwara et al., Real-time spectroscopic ellipsometry studies of the nucleation and grain growth processes in microcrystalline silicon thin films, Phys. Rev. B, 63, 115306-1-115306-9, 2001.
Fujiwara et al., Microcrystalline silicon nucleation sites in the sub-surface of hydrogenated amorphous silicon, Sur. Sci., 497, pp. 333-340, 2002,
Lee et al., “Stability of NC-SI:H TFTS With Silicon Nitride Gate Dielectric,” IEEE Transactions on Electron Devices, 2007, vol. 54, No. 1, pp. 45-51.
“International Search Report (Application No. PCT/JP2009/057816) Dated Jun. 23, 2009”.
“Written Opinion (Application No. PCT/JP2009/057816) Dated Jun. 23, 2009”.
“International Search Report (Application No. PCT/JP2009/057711) Dated Jun. 30, 2009”.
“Written Opinion (Application No. PCT/JP2009/057711) Dated Jun. 30, 2009”.
Jinbo Yasuhiro
Yamazaki Shunpei
Costellia Jeffrey L.
Jung Michael
Nixon & Peabody LLP
Richards N Drew
Semiconductor Energy Laboratory Co,. Ltd.
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