Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-05-10
2004-06-15
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S365000, C257S401000, C257S508000, C257S758000
Reexamination Certificate
active
06750496
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a manufacturing method of a semiconductor integrated circuit device and a technique of the semiconductor integrated circuit device, and more particularly, to a technique effectively applied to an exposure technique in a manufacturing process of a semiconductor integrated circuit device.
BACKGROUND OF THE INVENTION
As a pattern of a wiring or element constituting a semiconductor integrated circuit device becomes finer and higher integrated, high precision for superposition between patterns is required for exposure treatment for transferring the pattern on a semiconductor substrate. This superposing precision largely depends on a superposition precision (performance) of pattern that an exposure apparatus deals with. Therefore, it is common to lay out the pattern in a state in which an alignment tolerance determined by the superposition performance of the exposure apparatus is secured.
Further, as another technique for securing the alignment tolerance of the above-mentioned pattern, Japanese Patent Laid-open No. 10-284700 discloses a technique for deforming a shape of a pattern such that a dimension thereof in a side which requires higher superposing precision becomes smaller. Further, for example, Japanese Patent Laid-open No. 5-19446 discloses a technique of a phase shift mask, in which, in order to expose various and fine patterns, a predetermined correcting pattern is provided on either an end of a mask pattern region having a constant mode or a boundary portion of a mask pattern region having a plurality of modes.
SUMMARY OF THE INVENTION
However, the present inventors have found that the superposing technique of the above-mentioned pattern has the following problems.
That is, in the technique for deforming the shape of the above-mentioned pattern and reducing the dimension thereof, it is possible to form a pattern in such a state that an alignment tolerance is secured in the case where there is a margin of resolution, but as the pattern dimension approaches resolution limit value of the exposure apparatus, the formation control performance of this pattern and the margin for forming the pattern are remarkably reduced. Therefore, even if the alignment tolerance of the pattern can be secured, the pattern itself can not be formed satisfactorily in some cases.
An object of the present invention is to provide a technique capable of enhancing the alignment tolerance of a pattern.
The above and other object and new features of the present invention will be apparent from the description of the specification and the accompanying drawings.
Of the inventions disclosed in the present application, outlines of typical inventions are briefly described as follows:
That is, the present invention uses a mask pattern formed on a photomask which is designed to be disposed such that the mask pattern is separated from a wiring so that the mask pattern is connected to the first hole patterns and is not connected to the wiring even if the second hole patterns sandwiching the wiring is deviated in position when second hole patterns are transferred on first hole patterns sandwiching a wiring.
Further, according to the present invention, the light transfer pattern forming said mask pattern is disposed on an straight line extending in a direction intersecting with said wiring and is not disposed on a straight line extending along said wiring and is deviated alternatively.
Further, according to the present invention, an adjacent distance between the light transfer patterns disposed along said wiring is shorter than an adjacent distance between the light transfer patterns disposed along a direction intersecting with said wiring.
Further, according to the present invention, a phase shifter is disposed in one of the light transfer patterns adjacent to each other.
The present invention comprises the steps of: forming a plurality of first regions on a semiconductor substrate; depositing a first insulative film on said semiconductor substrate; forming, on said first insulative film, a first hole pattern electrically connected to each of said plurality of first regions; forming, on said first insulative film, a wiring which intersects relative to said plurality, of first regions so as to pass through an adjacent gap between said first hole patterns; depositing a second insulative film for covering said wiring; depositing a positive type photoresist film on said second insulative film; performing exposure treatment of said positive type photoresist film by using a photomask and thereby forming a photoresist pattern for forming a second hole pattern on said second insulative film; and performing etching treatment by using said photoresist pattern as an etching mask and thereby forming, on said second insulative film, said second hole pattern that is connected to said first hole pattern but is not connected to said wiring, wherein said hole pattern is disposed such that even if a position thereof is deviated, a connection between said first and second hole patterns is kept and an insulative state between said second hole pattern and said wiring is kept, and a pair of second patterns disposed to put said wiring therebetween and be close to the wiring are disposed separately from said wiring put between the pair of second hole patterns; wherein said photomask includes a plurality of light transfer patterns for transferring said second hole pattern; wherein said plurality of light transfer patterns disposed along a first direction in which said wiring extends are not disposed on a straight line but are disposed so as to be deviated alternately in a second direction intersecting with said first direction, and said plurality of light transfer patterns disposed along said second direction are disposed on a straight line; wherein an adjacent pitch between the light transfer patterns disposed along said first direction is shorter than an adjacent pitch between the light transfer patterns disposed along said second direction; and wherein a phase shifter is disposed on any one of the light transfer patterns adjacent to each other among said plurality of light transfer patterns.
Further, the present invention comprises the steps of: forming a plurality of first regions on a semiconductor substrate; depositing a first insulative film on said semiconductor substrate; forming, on said first insulative film, a first hole pattern electrically connected to each of said first regions; forming, on said first insulative film, a wiring which intersects relative to said first regions so as to pass through an adjacent gap between said first hole patterns; depositing a second insulative film for covering said wiring; depositing a positive type photoresist film on said second insulative film; performing exposure treatment of said positive type photoresist film by using a photomask and thereby forming, on said second insulative film, a photoresist pattern for forming a second hole pattern; and performing etching treatment by using said photoresist pattern as an etching mask and thereby forming, on said second insulative film, said second hole pattern that is connected to said first hole pattern but is not connected to said wiring, wherein a pair of second hole patterns disposed to put said wiring therebetween and be close to the wiring are disposed such that a center of at least one of said pair of second hole-patterns is deviated from a center of said first hole pattern, and are disposed separately from said wiring put between the pair of second hole patterns; wherein said photomask includes a plurality of light transfer patterns for transferring said second hole pattern; wherein said plurality of light transfer patterns disposed along a first direction in which said wiring extends are not disposed on a straight line but are disposed so as to be deviated alternately in a second direction intersecting said first direction, and said plurality of light transfer patterns disposed along said second direction are disposed on a straight line; wherein an adjacent pitch between th
Hasegawa Norio
Hayano Katsuya
Imai Akira
Antonelli Terry Stout & Kraus LLP
Peralta Ginette
Pham Long
Renesas Technology Corp.
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