Manufacturing method of semiconductor IC device

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C438S694000, C438S701000

Reexamination Certificate

active

06806195

ABSTRACT:

FIELD OF THE INVENTION
This invention pertains to a manufacturing method of a semiconductor IC device. In particular, this invention pertains to a manufacturing method of a semiconductor IC device having connecting holes or trenches with a high dimensional precision and fine configuration.
BACKGROUND OF THE INVENTION
The present inventors have surveyed the manufacturing methods of the semiconductor IC device. The following is a summary of the technologies surveyed by the present inventors.
In DRAM (Dynamic Random Access Memory) having the so-called capacitor-over-bit line (COB) type of memory cells with capacitors for storing information set above the bit lines, after formation of the bit lines (BL), an electrical connection occurs between the lower electrodes of the capacitor (storage node electrode, storing electrode) and the semiconductor region that becomes the drain of the MOSFET (Metal Oxide Semiconductor Field Effect Transistor) formed in the semiconductor substrate. For this purpose, connecting holes are formed on the insulating film made of silicon in the area between them.
In this case, with the progress in miniaturization, it has become more difficult to ensure the alignment tolerance between the aforementioned connecting holes and the bit lines. Consequently, studies have been performed on the technology used to form the aforementioned connecting holes in a self-aligned manner along the step of the said bit lines by covering said bit lines with a silicon nitride film, and using the silicon nitride film as an etching stopper film in the dry etching processing for forming the aforementioned connecting holes on the silicon nitride film.
For example, Japanese Kokai Patent Application No. Hei 3[1991]-214669 disclosed a type of semiconductor IC device having DRAM.
However, when the aforementioned connecting holes are formed, the silica film is dry-etched and the hole-opening property is improved. In this case, the etching selectivity for the silicon nitride film that covers the bit lines is degraded, so that the connecting holes come in contact with the bit line and the formation operation of the connecting holes becomes incomplete.
Consequently, it was once proposed that the thickness of the silicon nitride film covering the bit lines be increased. However, in this case, due to the stress of the silicon nitride film, the bit lines and the semiconductor substrate, as well as the MOSFET and various other structural elements formed on the substrate undergo deformation.
The purpose of this invention is to provide a technology that allows the formation of connecting holes and trenches having high dimensional precision and fine structure.
The aforementioned purpose and other purposes of this invention will be explained in the following with reference to the text and FIGS. of this specification.
REFERENCE NUMERALS AND SYMBOLS AS SHOWN IN THE DRAWINGS
1
represents a semiconductor substrate (substrate),
1
a
a trench,
2
a silica film (insulating film),
2
a
a trench,
2
b
an opening,
3
a polysilicon film (first mask film),
4
a resist film,
5
a polysilicon film (second mask film),
5
a
a polysilicon film (side wall),
6
a silica film (insulating film),
6
a
a silica film (separating film),
7
a gate insulating film,
8
a gate electrode,
9
an insulating film,
10
a side-wall insulating film (side wall spacer),
11
a gate region,
12
a semiconductor region,
13
a silica film,
14
a plug,
15
a silica film (insulating film),
16
a wiring layer,
17
a silica film (insulating film),
17
a
a trench,
18
a polysilicon film (first mask film),
19
a resist film,
20
a polysilicon film (second mask film),
20
a
a polysilicon film (side wall),
21
a connecting hole,
22
a plug,
23
a lower electrode of capacitor,
24
a dielectric film of capacitor,
25
an upper electrode of capacitor,
26
a Silica film (insulating film),
26
a
a trench,
27
a polysilicon film (first mask film),
28
a resist film,
29
a polysilicon film (second mask film),
29
a
a polysilicon film (side wall),
30
a trench,
31
an aluminum layer (electroconductive layer),
31
a
an aluminum layer (wiring layer).
SUMMARY OF THE INVENTION
The following is a brief explanation of the invention disclosed in this patent application.
The manufacturing method of a semiconductor IC device of this invention comprises the following steps of operation:
a step in which an insulating film is formed on a semiconductor substrate or SOI substrate;
a step in which a first mask film is formed on the aforementioned insulating film;
a step in which, after a resist film is formed on the aforementioned first mask film, the resist film is used as an etching mask to form an opening on the aforementioned first mask film, followed by the formation of trenches on the aforementioned insulating film exposed from the opening;
a step in which, after the aforementioned resist film is removed, a second mask film is formed on the aforementioned semiconductor substrate or SOI substrate;
a step in which, by removing the aforementioned second mask film such that it is left on the side walls of the aforementioned trenches, a side wall made of the aforementioned second mask film is formed on the side walls of the aforementioned trenches;
and a step in which the aforementioned first mask film and the aforementioned side wall are used as the etching mask in etching off the aforementioned insulating film exposed from the mask, so as to form connecting holes on the aforementioned insulating film.
This invention also provides a manufacturing method of semiconductor IC device, characterized by the fact that it consists of the following steps of operation:
a step in which an insulating film is formed on a semiconductor substrate or SOI substrate;
a step in which a first mask film is formed on the aforementioned insulating film;
a step in which, after a resist film is formed on the aforementioned first mask film, the resist film is used as an etching mask to form an opening on the aforementioned first mask film, followed by the formation of trenches on the aforementioned insulating film exposed from the opening;
a step in which, after the aforementioned resist film is removed, a second mask film is formed on the aforementioned semiconductor substrate or SOI substrate;
a step in which, by removing the aforementioned second mask film such that it is left on the side walls of the aforementioned trenches, a side wall made of the aforementioned second mask film is formed on the side walls of the aforementioned trenches;
a step in which the aforementioned first mask film and the aforementioned side wall are used as the etching mask in etching off the aforementioned insulating film exposed from the mask, so as to form an opening on the aforementioned insulating film, followed by the formation of separating trenches on the aforementioned semiconductor substrate or SOI substrate exposed from the opening;
and a step in which an insulating film is buried in the aforementioned separating trenches to form a separating portion.
This invention also provides a manufacturing method of a semiconductor IC device characterized by the fact that it consists of the following steps of operation:
a step in which an insulating film is formed on a semiconductor substrate or SOI substrate;
a step in which a first mask film is formed on the aforementioned insulating film;
a step in which, after a resist film is formed on the aforementioned first mask film, the resist film is used as an etching mask to form an opening on the aforementioned first mask film, followed by the formation of trenches on the aforementioned insulating film exposed from the opening;
a step in which, after the aforementioned resist film is removed, a second mask film is formed on the aforementioned semiconductor substrate or SOI substrate;
a step in which, by removing the aforementioned second mask film such that it is left on the side walls of the aforementioned trenches, a side wall made of the aforementioned second mask film is formed on the side walls of the aforementio

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