Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2002-03-20
2004-07-20
Le, Vu A. (Department: 2824)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
Reexamination Certificate
active
06764963
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device on a silicon carbide substrate having a prescribed crystal plane orientation. It particularly relates to a method of manufacturing a semiconductor device that uses a gate insulation layer, such as a metal-oxide semiconductor (MOS) capacitor or a MOS field-effect transistor (MOSFET).
2. Description of the Prior Art
The interface-trap density of an oxide-silicon carbide interface using a silicon carbide (SiC) substrate is roughly ten times higher than that of a silicon MOS transistor. This gives rise to the problem that a SiC substrate based MOSFET has a lower channel mobility than a silicon substrate based MOSFET. In particular, a bulk SiC substrate having the crystal structure referred to as 4H-SiC has about twice the channel mobility of a bulk SiC substrate having the crystal structure referred to as 6H-SiC, so it should be possible to utilize this to lower the on-resistance of a power MOSFET. However, a 4H-SiC oxide/SiC interface has more defects (a higher interface-trap density) than a 6H-SiC one, and as a result, the 4H-SiC structure has a lower channel mobility. Therefore, in order to realize a SiC MOSFET having a low on-resistance, it is critically important to reduce the interface-trap density of a 4H-SiC MOS structure. A SiC MOSFET formed on the (0001) face usually has a channel mobility of not more than 10 cm
2
/Vs.
There are reports of the channel mobility being improved to 30 cm
2
/Vs by reducing the interface-trap density by using H
2
O (water) to form a gate insulation layer on the (11-20) face of the SiC. It is already known that using the (11-20) face is more advantageous than using the (0001) face. However, this is still not enough, since a channel mobility of 100 cm
2
/Vs or more is required to reduce the SiC power MOSFET on-resistance to the theoretical value.
This being the case, efforts have focused on improving the interface between the semiconductor substrate and the gate insulation layer. In most cases, such efforts involve using heat treatment to reduce the interface-trap density. As described below, a number of disclosures have been made relating to the method of oxidizing the SiC substrate and the heat-treatment method used following the oxidation.
JP-A HEI 9-199497, for example, discloses a method of improving a thermal oxidation film of a SiC single-crystal substrate by following the oxidation step with an annealing step using hydrogen and an annealing step using inert gas, to thereby reduce hysteresis and flat band-shift. In particular, this publication describes a method in which the SiC oxidation is followed by hydrogen annealing at 1000° C. This method relates to the (0001) face of a SiC substrate; the disclosure does not describe a method relating to the (11-20) face. Moreover, a temperature of 1000° C. is too high, with the oxidation layer being reduced by the hydrogen, degrading the reliability of a device in which the oxidation layer is used as a gate oxidation layer.
JP-A HEI 10-112460 discloses a SiC semiconductor device fabrication method in which, to reduce the interface-trap density after forming a thermal oxidation layer, the thermal oxidation layer is subjected to less than two hours of annealing in an inert gas atmosphere and heat-treated at a low temperature of 300° C. to 500° C. in hydrogen or a gas, such as water vapor, containing hydrogen atoms. This is then followed by a cooling period, at least part of which takes place in a gaseous atmosphere containing hydrogen atoms. So, the publication specifically describes a method in which the gate oxidation layer is formed and heat-treated at 300° C. to 500° C. in an atmosphere containing hydrogen atoms, but it is a method that relates to the (0001) face of a SiC substrate, and contains no description relating to the (11-20) face. Also, the heat treatment temperature within the range 300° C. to 500° C. is too low for adequate heat-treatment.
JP-A HEI 11-31691 discloses a method of forming a thermal oxidation layer in a SiC semiconductor device in which, in order to reduce the interface-trap density after forming the layer, (1) in a method of forming a thermal oxidation layer in which the silicon dioxide is grown by a pyrogenic oxidation process that performs thermal oxidation introducing hydrogen and oxygen, a hydrogen-oxygen mixture is used, in which there is more oxygen than hydrogen, or (2) after oxidation, cooling is conducted in an atmosphere containing hydrogen atoms using a cooling rate within the range 0.3 to 3° C./min, or (3) after oxidation and cooling, extraction is effected at a temperature of not more than 900° C. While the disclosure does describe a method of cooling in an atmosphere containing hydrogen after the pyrogenic oxidation, it is a method that relates to the (0001) face of a SiC substrate, and does not describe the method with respect to the (11-20) face. Also, the described mixture ratio of hydrogen arid oxygen used in the pyrogenic method is not optimal.
JP-A 2000-252461 describes a semiconductor device fabrication method in which one, or two or more oxide and/or nitride gate insulation layers are formed on at least the topmost layer of a SiC semiconductor substrate and then annealed at 600° C. to 1600° C. in an atmosphere containing hydrogen. In this method, a good gate insulation layer-SiC interface able to adequately stand up to actual use can be obtained by using hydrogen to terminate silicon or carbon dangling bonds that exist in the interface to thereby adequately reduce the interface-trap density. While the disclosure does describe the use of heat-treatment in hydrogen after forming the oxide layer on the SiC substrate, the method relates to the (0001) face of a SiC substrate and is not described with reference to the (11-20) face.
JP-A HEI 7-131016 relates to a field-effect transistor formed of hexagonal SiC crystal having a high power conversion capacity and to a method for manufacturing the transistor, in which the high power conversion capacity is attained by reducing the leakage current between the source and the drain when the gate voltage is off and reducing the electrical resistance when the gate voltage is on. For this, the main current flow path, meaning the current flow between source and drain in the case of a field-effect transistor, is formed parallel to the (0001) face and the channel formation surface is formed parallel to the (11-20) face. While the disclosure does describe the fabrication of a MOSFET structure characterized by the channel formation surface being parallel to the (11-20) face of hexagonal single-crystal SiC substrate, it does not describe a method of forming the gate oxidation layer of a MOSFET.
United States of America Patent (U.S. Pat. No. 5,972,801) discloses a method of improving the performance of an oxide-based device by obtaining an improved oxide layer. The method reduces defects in the oxide layer on the SiC substrate by using a process in which the oxide layer is exposed to an oxidizing atmosphere at a temperature that is not high enough to cause further oxidation of the SiC substrate but is high enough for diffusing the oxidation source gas within the oxides, and for a time that is not long enough to cause further oxidation of the SiC substrate but is long enough to enhance the characteristics of the interface between the oxidation layer and the substrate by increasing the density of the oxidation layer. The disclosure describes a method of processing the formed gate oxidation layer at 600° C. to 1000° C. in an atmosphere containing H
2
O (water), but in this case the H
2
O used is not formed by the combustion of H
2
and O
2
, but is H
2
O vapor produced by heating pure water. Moreover, the method as described does not relate to formation of a gate oxidation layer on the (11-20) face followed by heat-treatment.
Thus, SiC MOSFETs have usually been formed on the (0001) face, but the channel mobility of such devices has not exceeded 10 cm
2
/Vs. Also, the literature contains examples o
Arai Kazuo
Fukuda Kenji
Kosugi Ryoji
Senzaki Junji
Suzuki Seiji
Le Vu A.
National Institute of Advanced Industrial Science and Technology
Owens Beth E.
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