Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-12-14
2003-06-10
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
Reexamination Certificate
active
06576562
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a manufacturing method of semiconductor device using a mask pattern whose etch profile upon etching processing is improved, and more particularly to a manufacturing method of semiconductor device in which a object to be processed is processed with the mask pattern formed by processing a multi-layered film.
2. Description of the Related Art
The manufacturing method of semiconductor device includes a number of steps in which plural kinds of substances are deposited on a silicon wafer as films to be processed and the films are patterned into a desired pattern. The patterning of the films is carried out in the following process. First, a photosensitive material generally called resist is deposited on the film to be processed so as to form a resist film on the film. Subsequently, a predetermined region of the resist film is exposed to light. Next, an exposed portion or non-exposed portion of the resist film is removed by development processing so as to form a resist pattern. Further, by dry etching the film to be processed with the resist pattern as an etching mask, patterning of the film is carried out.
To keep a necessary resolution, exposure amount tolerance or focus tolerance at the time of the pattern exposure, the resist film thickness is required to be reduced. For the reason, a required film thickness of the resist film cannot be secured in the etching process of the film to be processed. To solve the problem, a method in which a mask material having a higher etching resistance than that of the resist pattern is formed on the film to be processed and then the resist pattern is transferred to the mask material and the film to be processed in succession has been currently applied.
Conventionally, for example, aluminum and the like, or carbon and the like have been used as the mask material. These materials can be formed by a dry method such as CVD method, sputtering method and vapor deposition method. Materials obtained by resins such as novolac resin, polyhydroxy styrene conventionally used in the resists, which are hardened at high temperature. Polysilane is also used for the mask material. Those mask material such as hardening resin and polysilane can be formed by such a wet method as spin coating method.
Because the metal film and carbon for use in forming a film according to the dry method requires a vacuum system, their processing cost is high.
A left mask material pattern after processing of a film to be processed is finished is difficult to remove because polysilane contains inorganic components. Further, a material produced by baking resin used in a photo resist is likely to undergo side etching during etching of the mask material, so that high-precision processing of the mask material pattern is disabled.
When the processing precision of the mask material pattern is reduced by the side-etching, the processing precision of the film to be processed also drops. As a result, there occurs such a problem that reliability upon operation of the semiconductor device drops remarkably. Then, accompanied by accelerated miniaturization of the semiconductor device, an influence of these problems has been increasing more and more.
No mask material preferably used for manufacturing of the semiconductor device has been obtained yet.
BRIEF SUMMARY OF THE INVENTION
According to an aspect of the present invention, there is provided a manufacturing method of semiconductor device comprising: forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object; forming a mask material pattern by etching the mask material to a desired pattern; and etching the object to transfer the mask material pattern as a mask to the object.
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patent: 6177353 (2001-01-01), Gutsche et al.
Sato, Y. et al., “Method of Forming a Pattern”, U.S. Ser. No.: 09/814,839, Filed: Mar. 23, 2001, Specification—51 pages, and 4 sheets of drawings.
Sato, Y. et al., “Method of Forming a Pattern”, U.S. Ser. No.: 09/512,286, Filed: Feb. 24, 2000, Specification—137 pages, and 18 sheets of drawings.
Matsuo, M. et al., “Stacked Circuit Device and Method for Evaluating an Integrated Circuit Substrate Using the Stacked Circuit Device”, U.S. Ser. No.: 09/957,510, Filed: Sep. 21, 2001, Specification—17 pages, and 5 sheets of drawings.
Hayashi Hisataka
Ohiwa Tokuhisa
Ohuchi Junko
Onishi Yasunobu
Sato Yasuhiko
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Le Thao P
Nelms David
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