Manufacturing method of semiconductor device

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C438S585000, C438S669000, C438S720000, C438S721000, C438S742000

Reexamination Certificate

active

06713397

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a manufacturing method of a semiconductor device and, more particularly, to a manufacturing method of a semiconductor device having a gate electrode which is formed on a gate insulative film on a semiconductor substrate and at least a part of which is made of a metal material.
2. Related Background Arts
In recent years, to realize high integration and high speed of an LSI, for example, a gate electrode having a laminate structure including a metal material layer of a high melting point such as tungsten (W) or the like and a polysilicon layer showing conductivity has been being developed. The electrode structure of such a multilayer is an indispensable technique after the future design reference generation of 0.13 &mgr;m. It is earnestly being examined to apply it to devices.
A conventional forming method of a gate electrode of a polysilicon-metal multilayer structure including a polysilicon layer and a metal film will now be described hereinbelow with reference to FIGS.
5
(
a
) to
5
(
c
). FIGS.
5
(
a
) to
5
(
c
) are cross sectional step diagrams showing the conventional forming method of the gate electrode having the polysilicon-metal multilayer structure.
First, as shown in FIG.
5
(
a
), a gate oxide film
302
having a film thickness of, for example, 30 Å, a conductive polysilicon film
303
having a film thickness of, for example, 1000 Å and containing a conductive impurity, a W/WN
x
laminate film
304
having a film thickness of, for example, 1000 Å and consisting of tungsten and tungsten nitride, a silicon nitride film (Si
3
N
4
)
305
having a film thickness of, for example, 3000 Å, and a photoresist film
306
are sequentially laminated onto a silicon substrate
301
. The Si
3
N
4
film
305
plays a role of a reflection preventing film in a photolithography step to the photoresist film
306
. A part of the silicon nitride film
305
is used as an etching mask in the subsequent working step of the gate electrode.
Subsequently, as shown in FIG.
5
(
b
), the photoresist film
306
is subjected to a patterning work comprising exposing and developing processes according to a photolithography technique so as to become a predetermined shape (gate electrode shape) which is necessary for working the gate electrode.
A patterned photoresist film
306
a
is used as an etching mask and the silicon nitride film
305
is subjected to a selective etching process by an RIE (Reactive Ion Etching) method. An etched silicon nitride film
305
a
is used as an etching mask and in a state where the photoresist film
306
a
remains on the mask, the lower laminate film
304
and polysilicon film
303
are sequentially subjected to a selective etching process.
Thus, as shown in FIG.
5
(
c
), the Si
3
N
4
film
305
a
is used as an etching mask and a gate electrode consisting of a W/WN
x
laminate film
304
a
and a polysilicon film
303
a
is formed under the film
305
a.
According to the RIE method, an organic system sub-product
307
is formed on the side surface of the gate electrode including the Si
3
N
4
film by a reaction between an etching gas and a photoresist material remaining on the etching mask
305
a.
Since the organic system sub-product
307
is formed on the side surface of the gate electrode, each side surface of the Si
3
N
4
film
305
a,
W/WN
x
laminate film
304
a,
and polysilicon film
303
a
is not excessively etched but the gate electrode which maintains a vertical shape is formed.
Subsequently, as shown in
FIG. 6
, the organic system sub-product
307
is removed by an etching dissolution by using a treatment solution containing a hydrogen peroxide solution (H
2
O
2
) such as sulfate peroxide solution (sulfate+hydrogen peroxide solution), ammonia peroxide solution (ammonia+hydrogen peroxide solution), or the like, or an interface between the organic system sub-product
307
and the gate electrode is peeled off by using a hydrofluoric acid solution by an etching operation, thereby removing the organic system sub-product
307
.
As mentioned above, the gate electrode consisting of the polysilicon film
303
a
and W/WN
x
laminate film
304
a
is formed.
However, the conventional forming method of the gate electrode including the metal layer film has the following problems in the removing step of the organic system sub-product formed on the side surface of the gate electrode.
<1> In case of removing the organic system sub-product by using the treatment solution containing (H
2
O
2
) such as sulfate peroxide solution, ammonia peroxide solution, or the like, there is a problem such that the metal material (W/WN
x
laminate film) constructing the gate electrode is oxidized by the treatment solution and eluted, a thickness of metal layer film is reduced, and the gate electrode is extinguished. Further, the eluted metal components also become causes of various contamination.
<2> In case of removing the organic system sub-product by using the hydrofluoric acid solution, if an etching rate of the hydrofluoric acid treatment solution is too high, there is a fear such that the gate oxide film which is exposed from the gate electrode is extinguished at a position below the gate electrode. When the gate oxide film portion is extinguished, this oxide film portion cannot be used as a protective film for ion implantation for a source and a drain after the formation of the gate. When the oxide film portion is extinguished, there is a problem such that the hydrophobic silicon substrate is exposed. When the hydrophobic silicon substrate is exposed, in a cleaning step after the gate electrode was formed, a water droplet of a cleaning liquid is adhered onto the exposed silicon substrate and becomes a cause of occurrence of watermark-shaped dry defectives.
SUMMARY OF THE INVENTION
It is, therefore, an object of the invention to provide a novel and improved manufacturing method of a semiconductor device which can prevent an elution of a gate electrode material and prevent an extinction of a gate insulative film.
To accomplish the above object, according to the first aspect of the invention, there is provided a manufacturing method of a semiconductor device in which a gate electrode at least a part of which is made of a metal material is formed on a gate insulative film formed on a semiconductor substrate, comprising the steps of: forming the gate electrode while forming metal system sub-products onto side walls of the gate electrode, by etching a gate electrode layer formed on the semiconductor substrate; oxidizing the metal system sub-products formed on the side walls of the gate electrode; and removing the oxidized metal system sub-products by a solution whose etching rate for the gate insulative film is adjusted to be equal to or less than 10 Å/min.
According to the second aspect of the invention, there is provided a manufacturing method of a semiconductor device in which a gate electrode at least a part of which is made of a metal material is formed on a gate insulative film formed on a semiconductor substrate, comprising the steps of:
sequentially forming the gate insulative film, a gate electrode layer at least a part of which is made of a metal material, and a silicon nitride film or a silicon oxide film onto the semiconductor substrate; etching the silicon nitride film or silicon oxide film into a predetermined shape; forming the gate electrode while forming metal system sub-products onto side walls of the gate electrode, by etching the gate electrode layer with using the silicon nitride film or silicon oxide film etched in the predetermined shape as a mask; oxidizing the metal system sub-products formed on the side walls of the gate electrode; and removing the oxidized metal system sub-products.
The step of removing the oxidized metal system sub-products may be executed by using an ammonium fluoride solution.
In the ammonium fluoride solution, an etching rate for the gate insulative film may be adjusted to be equal to or less than 10 &angst

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