Manufacturing method of semiconductor device

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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Reexamination Certificate

active

06335289

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device and more particularly to a method of forming a well conductive polysilicon line on a stepped substrate.
2. Description of the Related Art
As an example of the conventional method of forming a polysilicon line on a stepped substrate, a method of manufacturing a flash memory element is described, with reference to the drawings.
FIG. 1
is a plan view showing a flash memory element in the manufacturing stage where a silicide film has just been formed, though not shown in the drawing, over gates as well as diffusion regions thereof. FIG.
2
and
FIG. 3
are cross-sectional views of
FIG. 1
, taken on line A—A and on line B—B, respectively. Further,
FIG. 4
is a series of cross-sectional views taken on line A—A, illustrating the steps of the manufacturing method over a recess in the vicinity of a field isolating film. Regarding reference numerals in
FIG. 1
,
101
represents a memory cell gate,
102
, a field isolating film and
103
, a unit cell region.
First, upon a silicon substrate
1
, field isolating films
2
(
102
) are formed in stripes and, over the rest of the substrate surface left between these field isolating films, silicon oxide films
3
are formed.
Next, a polysilicon film to be used for floating gates is applied over this substrate and, through patterning, floating gates
4
are formed therefrom.
Subsequently, inter-gate insulating films
5
made of an ONO film (silicon oxide film/silicon nitride film/silicon oxide film) or the like are formed (FIG.
4
(
a
)).
Next, a polysilicon film to be used for control gates is applied to fill up the gaps between the floating gates and, through patterning, control gates
6
which intersect the field isolating films
2
(
102
) at right angles are formed therefrom in stripes (FIG.
4
(
b
)).
Next, performing ion implantation into the substrate surface with a low dose, LDD (Lightly Doped Drain) diffusion regions
9
to make the device have a higher breakdown voltage are formed.
Next, after a silicon oxide film to be used for sidewall formation is grown by the CVD (Chemical Vapour Deposition) or the like, the film is etched back by anisotropic etching so as to form, on lateral faces of the gates, sidewalls composed of the silicon oxide film. After that, performing ion implantation into the substrate surface, diffusion regions
8
that are to become source-drain regions (SD diffusion regions) are formed.
Next, after ion implantation to amorphize the surfaces of the control gates
6
as well as those of diffusion regions
8
is carried out, a refractory metal such as Ti, Co or the like is deposited by means of sputtering and, with a subsequent heat treatment for silicidation performed, a silicide film
10
is formed on control gates as well as diffusion regions (FIG.
4
(
c
)).
The conventional manufacturing method described above, however, has the following problems. As shown in FIG.
4
(
b
), a depression
11
arises on a section of a control gate
6
lying over a recess between two floating gates
4
. Within this depression
11
, a part of the silicon oxide film (residual silicon oxide film
12
) remains even after the silicon oxide film is subjected to etching back in the step of forming sidewalls. This residual silicon oxide film
12
hinders the ion implantation for amorphization and the reaction for silicidation so that an uneven silicide film is formed. Once such an uneven silicide film is formed, the resistance of polysilicon gates cannot be sufficiently reduced, which leads not only to the deterioration of element characteristics but also to the reduction in production yield and reliability through the dispersion of the resistance values of the gates.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of manufacturing a semiconductor device, which is capable to form a well conductive polysilicon line on a stepped substrate and still possible to be used to produce semiconductor devices having excellent element characteristics and reliability with a high yield.
The first aspect of the present invention lies in a method of manufacturing a semiconductor device; which comprises the steps of:
forming, upon a substrate having a plurality of raised sections on the surface, a polysilicon film so as to fill up recesses formed between these raised sections and, through patterning, forming a polysilicon line therefrom;
forming a natural oxidation film or an oxide film with a thickness of 1 nm to 3 nm on the surface of said polysilicon line;
forming an additional polysilicon film by growing polysilicon thereon, and, thereafter, etching back said additional polysilicon film;
forming an insulating film thereon, and, thereafter, forming sidewalls from said insulating film through etching back;
forming a diffusion region on said substrate; and
forming a silicide film over said polysilicon line.
The second aspect of the present invention lies in a method of manufacturing a semiconductor device of the first aspect of the present invention; wherein, in the step of etching back said additional polysilicon film, etching is carried out under certain conditions while monitoring the etching rate or the emission intensity and etching is terminated through detecting the point when said oxide film changes the etching rate or the emission intensity.
The third aspect of the present invention lies in a method of manufacturing a semiconductor device of the first or second aspect of the present invention; which is a method of manufacturing a flash memory element wherein said raised sections form floating gates thereof and said polysilicon line which is to function as control gates thereof is laid on said floating gates over an inter-gate insulating film.
According to the present invention, a silicide film can be formed evenly over a polysilicon line that is formed on a stepped substrate so that, with this technique, semiconductor devices having excellent characteristics and reliability can be manufactured with a high yield.


REFERENCES:
patent: 5124271 (1992-06-01), Havemann
patent: 5354418 (1994-10-01), Kumihashi et al.
patent: 5394012 (1995-02-01), Kimura
patent: 5563096 (1996-10-01), Nasr
patent: 5909623 (1999-06-01), Saihara
patent: 6-295908 (1994-10-01), None

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