Manufacturing method of semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S622000, C438S627000, C438S631000, C438S637000, C438S643000, C257SE21582, C257SE21584, C257SE21585, C257SE21591

Reexamination Certificate

active

08003527

ABSTRACT:
A semiconductor device manufacturing method includes forming an interlayer dielectric film above a semiconductor substrate; forming a first wiring trench with a first width and a second wiring trench with a second width that is larger than the first width inr the interlayer dielectric film; forming a first seed layer that includes a first additional element in the first wiring trench and the second wiring trench; forming a first copper layer over the first seed layer; removing the first copper layer and the first seed layer in the second wiring trench while leaving the first copper layer and the first seed layer in the first wiring trench; forming a second seed layer in the second wiring trench after removing the first copper layer and the first seed layer in the second wiring trench; and forming a second copper layer over the second seed layer.

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A. Isobayashi et al., “Thermally Robust Cu Interconnects with Cu-Ag Alloy for sub 45nm Node”, IEEE IEDM 04, Apr. 2004, pp. 953-956, cited in spec.
H. Kudo et al., “Further Enhancement of Electro-migration Resistance by Combination of Self-aligned Barrier and Copper Wiring Encapsulation Techniques for 32-nm Nodes and Beyond”, IITC Jun. 2, 2008, pp. 117-119, cited in spec.
M. Haneda et al., “Self-Restored Barrier Using Cu-Mn Alloy”, AMC Oct. 9, 2007, pp. 27-28, cited in spec.

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