Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2008-06-24
2010-12-14
Pham, Thanh V (Department: 2894)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257S326000, C257SE21700, C257SE27112, C438S142000, C438S151000
Reexamination Certificate
active
07851279
ABSTRACT:
The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
REFERENCES:
patent: 5060034 (1991-10-01), Shimizu et al.
patent: 6472684 (2002-10-01), Yamazaki et al.
patent: 6498369 (2002-12-01), Yamazaki et al.
patent: 6509602 (2003-01-01), Yamazaki et al.
patent: 6759282 (2004-07-01), Campbell et al.
patent: 2002/0113268 (2002-08-01), Koyama et al.
patent: 2002/0185684 (2002-12-01), Campbell et al.
patent: 2003/0107077 (2003-06-01), Yamazaki et al.
patent: 2005/0029592 (2005-02-01), Campbell et al.
patent: 2005/0214988 (2005-09-01), Campbell et al.
patent: 2007/0128784 (2007-06-01), Campbell et al.
patent: 0 367 152 (1990-05-01), None
patent: 04-215473 (1992-08-01), None
patent: 05-145073 (1993-06-01), None
patent: 2000-356788 (2000-12-01), None
patent: WO 02/101825 (2002-12-01), None
International Search Report (Application No. PCT/JP2008/061077) dated Sep. 30, 2008.
Written Opinion (Application No. PCT/JP2008/061077) dated Sep. 30, 2008.
Kakehata Tetsuya
Takano Tamae
Yamazaki Shunpei
Payen Marvin
Pham Thanh V
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
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