Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-10-27
2001-11-20
Niebling, John F. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S030000, C438S155000, C349S042000
Reexamination Certificate
active
06319760
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to manufacturing method of a liquid crystal display having high aperture ratio and high transmittance, more particularly to manufacturing method of a liquid crystal display having high aperture ratio and high transmittance, wherein the method is capable of reducing numbers of photolithography process steps.
2. Description of the Related Art
Due to rapid developments in active matrix liquid crystal display, the active matrix liquid crystal display have been used in various TV and monitors for portable computers. The active matrix liquid crystal display has an advantage of excellent response characteristic and is appropriate for high number of pixels, therefore, high quality and large size of display devices comparable to the cathode ray tube(CRT) can be realized.
As an operation mode, twisted nematic(TN) mode and super twist nematic(STN) have been applied to the active matrix liquid crystal display. Herein, the TN and the STN are modes that an electric field is applied vertical to substrate plane. Although, the liquid crystal displays of the TN and the STN modes have been used practically, however there is a disadvantage of narrow viewing angle. According to this disadvantage, an In-plane switching(IPS) mode liquid crystal display is suggested to overcome the disadvantage of narrow viewing angle in the TN and STN mode liquid crystal display.
Although not shown in the drawings, said IPS mode liquid crystal display has a structure that a pixel electrode and a counter electrode, both for driving liquid crystal molecules, are provided on a same substrate in parallel and an electric field that is in-plane to substrate plane is applied. The IPS mode liquid crystal display has the advantage of viewing angle that is wider than the conventional TN or STN mode liquid crystal display. However, since the pixel and the counter electrodes are made of opaque metal layers, there is a limitation of developments in aperture ratio and transmittance.
Accordingly, in order to overcome the limitation of development in aperture ratio and transmittance of the IPS mode liquid crystal display, a fringe field switching(FFS) mode liquid crystal display is suggested. In the FFS mode liquid crystal display, pixel and counter electrodes are made of a transparent metal layer, for example ITO metal layer thereby providing an improved aperture ratio compared to said IPS mode liquid crystal display. Further, a distance between the counter and the pixel electrodes is narrower than that between upper and lower substrates. For this reason, there is formed a fringe field on upper portions of the counter and the pixel electrodes and then liquid crystal molecules disposed on said upper portions are all driven thereby improving the transmittance of the IPS mode liquid crystal display.
FIG. 1
is a cross-sectional view showing a lower substrate of a conventional FFS mode liquid crystal display and method of manufacturing the same is as follows. A transparent insulating substrate, for example a glass substrate
1
is provided. A transparent metal layer likewise an ITO metal layer and an opaque metal layer having a low resistance likewise MoW, are deposited on the glass substrate
1
in turn. A gate bus line
2
and a common signal line(not shown) are formed by patterning the opaque metal layer. The exposed ITO layer portion is patterned in the form of a rectangular plate or a comb having a plurality of branches, thereby forming a counter electrode
3
. The counter electrode
3
is formed to be contacted with the common signal line(not shown). The counter electrode
3
can be formed earlier than the gate bus line
2
. A gate insulating layer
4
is formed over the glass substrate
1
including the gate bus line
2
and counter electrode
3
.
An undoped amorphous silicon layer and a silicon nitride layer is deposited on the gate insulating layer
4
in turn. An etch stopper
6
is formed by patterning the silicon nitride layer. A doped amorphous silicon layer is deposited on the undoped amorphous silicon layer including the etch stopper
6
, and an ohmic contact layer
7
and a channel layer
5
are formed by patterning the doped amorphous silicon layer and the undoped amorphous silicon layer. A pad opening process is performed so as to expose pads(not shown) provided at edges of the glass substrate
1
.
An ITO metal layer and a low resistance metal layer are deposited on a resultant in turn. A data bus line(not shown) including source electrode
8
a
and a drain electrode
8
b
is formed by patterning the opaque metal layer, so that a thin film transistor
10
is formed. A pixel electrode having selected number of branches is formed by patterning the exposed ITO metal layer portion. The pixel electrode
9
is formed to be contacted with the source electrode
8
a.
A passivation layer
20
is coated over the resultant, and then the passivation layer
20
is patterned so that the passivation layer
20
covers the portion of thin film transistor
10
. Consequently, the lower substrate of the FFS mode liquid crystal display having high aperture ratio and high transmittance is accomplished.
However, the lower substrate of the liquid crystal display having high aperture ratio and high transmittance requires at least eight times of patterning processes, i.e. photolithography process e.g. steps of forming a gate bus line; forming a counter electrode; forming an etch stopper; forming a channel layer and an ohmic contact layer; opening a pad; forming a data bus line; forming a pixel electrode; and
forming a passivation layer. Furthermore, since the photolithography process itself includes a resist-coating step, an exposing step, a developing step, an etching step and a resist-removing step, it takes substantially many hours to manufacture the liquid crystal display having high aperture ratio and high transmittance. Therefore, the productivity is very low as well as the yield of production, and an exposing ask is required at each exposing step thereby increasing manufacturing cost.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to provide a manufacturing method of a liquid crystal display having high transmittance and high aperture ratio, wherein the method is capable of decreasing process time and cost by reducing numbers of photolithography process steps.
In order to accomplish the foregoing object of the present invention, the manufacturing method of a liquid crystal display comprises the steps of: providing a transparent insulating substrate having a displaying area and a non-displaying area; forming a light shielding pattern and a common signal line, with an opaque metal layer on the non-displaying area of the transparent insulating substrate; forming a counter electrode with a transparent metal layer on the displaying area of the transparent insulating substrate; depositing an insulating layer over the transparent insulating substrate so as to cover the light shielding pattern and the common signal line, and the counter electrode; forming source and drain electrodes to be overlapped with the light shielding pattern respectively on the insulating layer portions of both sides of the light shielding pattern and a data bus line connected to the source electrode; forming a pixel electrode with a transparent metal layer on the insulating layer portion of the displaying area; forming a channel layer on the light shielding pattern and on the source and drain electrode portion overlapped with the light shielding pattern; and forming a gate bus line having a gate insulating layer on the channel layer.
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patent: 5834344 (1998-11-01), Cheng
patent: 5859677 (1999-01-01), Watanabe et al.
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patent: 5965916 (1999-10-01), Chen
patent: 1011029 (1998-01-01), None
patent: 10105084 (1998-04-01), None
patent: 10269020 (1998-10-01), None
Lee Seok Lyul
Lee Seung Hee
Park Kyu Chang
Hyundai Electronics Industries Co,. Ltd.
Niebling John F.
Selitto Behr & Kim
Simkovic Viktor
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