Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2002-08-09
2003-09-02
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S217000, C438S258000, C438S761000, C438S763000, C438S778000
Reexamination Certificate
active
06613659
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a manufacturing method of a gate insulating film, especially to the technology to achieve a high voltage MOS (Metal Oxide Semiconductor) transistor having various kinds of gate insulating films with different thickness.
2. Description of the Related Art
A manufacturing method of a conventional gate insulating film will be explained hereinafter by referring to
FIGS. 13A-14B
.
In the following explanation, a manufacturing method of a plurality of gate insulating films with different thickness will be described. On a semiconductor substrate, two kinds of gate insulating films are formed, a thick gate insulating film, on which a high voltage MOS transistor is formed, and a thin gate insulating film, on which a normal voltage MOS transistor is formed.
First, as shown in
FIG. 13A
, a device isolation film
102
made of a LOCOS film is formed based on the well-known LOCOS (Local Oxidation of Silicon) technology by using an oxide film and a silicon nitride film formed on a semiconductor substrate, for example on a P-type semiconductor substrate
101
, as a mask.
Next, on the substrate
101
, a thick gate insulating film
103
is formed through thermal oxidation using the device isolation film
102
as a mask, as shown in
FIG. 13B
, after removing the oxide film and the silicon nitride film.
Then, as shown in
FIG. 13C
, a photoresist film
104
is formed on a part (the region where a high voltage MOS transistor is to be formed) of the thick gate insulting films
103
, and the other part (the region where a normal voltage MOS transistor is to be formed) of the thick gate insulating film
103
is removed by using the photoresist film
104
as a mask.
Furthermore, as shown in
FIG. 14A
, a thin gate insulating film
105
is formed on the region, where the normal voltage MOS transistor is to be formed, and from which the thick gate insulting film
103
has been removed, through thermal oxidation after the removal of the photoresist film
104
.
Then, a conductive film for gate electrodes is formed on the thick gate insulating film
103
and the thin gate insulating film
105
, as shown in FIG.
14
B. Then, gate electrodes
106
A and
106
B are formed by patterning the conductive film.
N type impurity regions (source and drain regions)
107
,
108
,
109
and
110
are formed adjacent the gate electrodes
106
A and
106
B respectively. In a subsequent process step not shown in the drawings, an interlayer insulating film is formed to cover the surface. Then, a metal interconnect, which makes contact with the source and the drain regions
107
,
108
,
109
,
110
through contact holes, is formed. This completes the high voltage MOS transistor on the thick gate insulating film
103
and the normal voltage MOS transistor on the thin gate insulating film
105
.
However, during the processes described above, the device isolation film
102
is etched along with the thick gate insulating film
103
(see the width A shown in FIG.
13
C), making the device isolation film thinner and, thus, lowering the device isolation ability of the film.
The higher the breakdown strength is required, the thicker the gate insulating film should be. However, when the gate insulating film, which is formed on the entire surface of the normal voltage region, is removed, the device isolation film is also thinned. The more the device isolation film is thinned, the more the device isolation ability of the film is deteriorated.
SUMMARY OF THE INVENTION
Therefore, the manufacturing method of a gate insulating film of this invention is directed to forming the gate insulating films with different thickness on a semiconductor substrate. The manufacturing method includes the process of forming a conductive film on gate insulating films after forming a plurality of the gate insulating films with desirable thickness, and the process of forming a selective oxidation film through selective oxidation of the conductive film using an anti-oxidation film as a mask after forming the anti-oxidation film on predetermined area of the conductive film.
The process of forming a plurality of the gate insulating films includes the process of forming a thick gate insulating film, removing the thick gate insulating film formed on the predetermined area of the conductive film, and forming a thin gate insulating film adjacent the thick gate insulating film.
Furthermore, the manufacturing method of the gate insulating film of this invention includes forming the gate insulating films with different thickness, a first insulating film formed on the semiconductor layer through thermal oxidation method and a second gate insulating film formed through selective oxidation method. The process of forming the first gate insulating film includes forming the thick gate insulting film on the semiconductor layer, removing the thick gate insulating film formed on the predetermined area of the semiconductor layer, and forming a thin gate insulating film adjacent the thick gate insulating film.
Furthermore, the process of forming the second gate insulating film is the same as that of the device isolation film.
REFERENCES:
patent: 5926729 (1999-07-01), Tsai et al.
patent: 6503800 (2003-01-01), Toda et al.
patent: 2001/0031523 (2001-10-01), Kimizuka
patent: 2003/0032223 (2003-02-01), Kikuchi et al.
Kikuchi Suichi
Momen Masaaki
Elms Richard
Morrison & Foerster / LLP
Owens Beth E.
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