Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2001-03-05
2003-07-15
Paladini, Albert W. (Department: 2827)
Metal working
Method of mechanical manufacture
Electrical device making
C029S831000, C029S852000, C174S264000
Reexamination Certificate
active
06591495
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multilayered printed circuit board and a manufacturing method therefor, and more particularly to a method of manufacturing a multilayered printed circuit board with which an opening is formed by using laser beam and by forming a plated film in the opening to form a via hole, an opening in a solder-resist layer and an opening for forming a through hole. The present invention relates to the structure of a substrate which is a core.
2. Background Art
A method of manufacturing a multilayered printed circuit board has been suggested in Japanese Patent Laid-Open No. 9-130038 which uses a so-called conformal mask such that a conductive layer is formed on the surface of an insulating resin layer. Moreover, an opening is formed in a portion of the conductive layer by etching, followed by irradiating the opening with a laser beam to form an opening in the insulating resin layer.
The foregoing technique, which uses a thick copper film having a thickness of 12 mm to 18 mm as the conformal mask, encounters a large thermal conductivity, causing heat to easily be dispersed. Hence it follows that a high output laser beam or a pulse-shape laser beam must be applied a multiple of times. Therefore, when the opening is formed in the insulating resin layer, undercut occurs with which the opening is widened in the lateral. If a via hole is formed by applying an electrolytic copper plated film and an electroless copper plated film to the opening, separation of the electrolytic copper plated film and the electroless copper plated film easily occurs. As a result, reliability in the connection has been unsatisfactory.
To a worse extent, the foregoing technique cannot form a conductive circuit having fine pitch. In the manufacturing process, the electroless copper plated film (0.1 &mgr;m to 5 &mgr;m) and the copper foil (12 &mgr;m to 18 &mgr;m) under the resist must be removed after the electrolytic copper plated film has been performed. Therefore, the width of the conductive circuit cannot be reduced.
Since the thick copper foil is employed as the conformal mask, a via hole having a small diameter cannot be formed. In the manufacturing process, the electroless copper plated film (2 &mgr;m) and the copper foil (12 &mgr;m to 18 &mgr;m) under the resist must be removed, the diameter of the via hole cannot easily be reduced.
To solve the foregoing problems, an object of the present invention is to suggest a multilayered printed circuit board which is capable of preventing occurrence of undercut if a conformal mask is employed.
A method disclosed in Japanese Patent Publication No. 4-3676 and using a “conformal mask” has the steps of previously forming a metal layer on an insulating resin layer; etching and removing the metal layer in the portion in which a via hole will be formed; and irradiating the opening with a laser beam so that only the insulating resin layer exposed through the opening is removed. The foregoing technique, which is capable of forming a plurality of via holes in the insulating resin layer, exhibits satisfactory productivity.
However, studies performed by the inventor of the present invention have resulted in resin which is left in the opening for forming the via hole, causing the residual resin to expand and unsatisfactorily move the via hole in the upward direction. Thus, there arises a problem in that the upper and lower layers are electrically insulated from each other.
Another problem has been detected as a result of the studies performed by the inventor of the present invention in that the resin in the periphery of the opening is raised excessively and, thus, the via hole is disconnected.
A still further object of the present invention is to obtain a multilayered printed circuit board having furthermore improved reliability in the connection in the via hole portion.
On the other hand, a multilayer forming technique which employs so-called RCC (RESIN COATED COPPER: Copper film having resin) as the built-up multilayered printed circuit board has been suggested. The foregoing technique has the steps of laminating RCC on a circuit substrate; etching the copper foil to form a through hole in a portion in which the via hole will be formed; irradiating the resin layer in the through hole portion with a laser beam to remove the resin layer opening as to form an opening; and filling the opening with plating so that the via hole is formed.
Another technique has been developed as disclosed in Japanese Patent Laid-Open No. 9-36551 with which one-side circuit substrates each having a through hole filled with a conductive substance are laminated through adhesive layers so that a multilayered structure is formed.
The foregoing multilayered printed circuit board is subjected to a process for coarsening the surface of the lower conductive circuit to maintain the adhesiveness between the surface of the lower conductive circuit and the interlayer insulating resin layer.
The coarsening method is exemplified by a method (hereinafter called a “Cu—Ni—P plating method”) of covering and coarsening the surface of the conductive circuit with a needle shape or porous plating layer made of a Cu—Ni—P alloy; a coarsening method (hereinafter called a “blackening and reducing method”) with which the surface of the conductive circuit is blackened (oxidized) and reduced; a coarsening method (hereinafter called a “soft etching method”) which uses mixed solution of peroxide and sulfuric acid to soft-etch the surface of the conductive circuit; and a coarsening method (hereinafter called a “scratching method”) with which the surface of the conductive circuit is scratched with a sandpaper or the like.
However, if the conductive circuit is coarsened by the Cu—Ni—P plating method of the blackening and reducing method, followed by forming an interlayer insulating resin layer, and followed by applying a laser beam to form an opening for forming the via hole in the interlayer insulating resin layer, the coarsened surface of the conductive circuit is undesirably removed and flattened owing to the irradiation with the laser beam. Thus, there arises a problem in that the adhesiveness with the via hole formed above the coarsened surface becomes defective.
The reason for this lies in that the coarsened surface formed by the above-mentioned process is colored and, thus, the colored surface undesirably absorbs the laser beam.
When the coarsened surface has been provided for the conductive circuit by the soft etching method or the scratching method, the coarsened surface does not absorb the laser beam. Since the coarsened surface has not sufficiently been coarsened, there arises a problem in that satisfactory adhesiveness cannot be realized between the conductive circuit and the interlayer insulating resin layer.
To solve the above-mentioned problems experienced with the conventional technique, a still further object of the present invention is to provide a multilayered printed circuit board and a manufacturing method each of which is able to realize satisfactory adhesiveness with the interlayer insulating resin layer which is formed on the conductive circuit, with which flattening of the coarsened surface of the surface of the conductive circuit can be prevented when a laser beam is applied to form the via hole in the interlayer insulating resin layer and which has a via hole (conductive circuit) having satisfactory adhesiveness.
With the conventional technique, the via hole is formed by drilling a through hole in the interlayer insulating resin layer and by disposing a metal film in the through hole. Hitherto, the through hole has been formed by employing photosensitive resin to constitute the interlayer insulating resin layer and by exposing a position corresponding to the through hole through a mask on which a black circle has been drawn to sensitize the interlayer insulating resin layer so as to dissolve the non-sensitized portion corresponding to the position of the black circle.
The foregoing photolithography method, however, encounters
Asano Kouji
En Honjin
Hirose Naohiro
Ishida Naoto
Noda Kouta
Alcala José H.
IBIDEN Co., Ltd.
Paladini Albert W.
Pillsbury Winthrop LLP Intellectual Property
LandOfFree
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