Manufacturing method for wiring

Details Manufacturing method for wiring Manufacturing method for wiring

2007-03-13

2007-03-13

Deo, Duy-Vu N. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S710000, C438S714000, C438S719000, C438S720000

Reexamination Certificate

active

10769852

ABSTRACT:
In the case in which a film for a resist is formed by spin coating, there is a resist material to be wasted, and the process of edge cleaning is added as required. Further, when a thin film is formed on a substrate using a vacuum apparatus, a special apparatus or equipment to evacuate the inside of a chamber vacuum is necessary, which increases manufacturing cost. The invention is characterized by including: a step of forming conductive layers on a substrate having a dielectric surface in a selective manner with a CVD method, an evaporation method, or a sputtering method; a step of discharging a compound to form resist masks so as to come into contact with the conductive layer; a step of etching the conductive layers with plasma generating means using the resist masks under the atmospheric pressure or a pressure close to the atmospheric pressure; and a step of ashing the resist masks with the plasma generating means under the atmospheric pressure or a pressure close to the atmospheric pressure. With the above-mentioned characteristics, efficiency in use of a material is improved, and a reduction in manufacturing cost is realized.

REFERENCES:
patent: 5429994 (1995-07-01), Ishikawa
patent: 5483082 (1996-01-01), Takizawa et al.
patent: 5549780 (1996-08-01), Koinuma et al.
patent: 5580796 (1996-12-01), Takizawa et al.
patent: 5824361 (1998-10-01), Asanuma
patent: 6429400 (2002-08-01), Sawada et al.
patent: 6660545 (2003-12-01), Furusawa
patent: 6909477 (2005-06-01), Yi et al.
patent: 2002/0109143 (2002-08-01), Inoue
patent: 2002/0128515 (2002-09-01), Ishida et al.
patent: 2002/0151171 (2002-10-01), Furusawa
patent: 2003/0054653 (2003-03-01), Yamazaki et al.
patent: 2003/0059975 (2003-03-01), Sirringhaus et al.
patent: 2003/0059984 (2003-03-01), Sirringhaus et al.
patent: 2003/0059987 (2003-03-01), Sirringhaus et al.
patent: 2003/0060038 (2003-03-01), Sirringhaus et al.
patent: 2003/0132987 (2003-07-01), Ogawa
patent: 2004/0075396 (2004-04-01), Okumura et al.
patent: 2004/0224433 (2004-11-01), Yamazaki et al.
patent: 2004/0253896 (2004-12-01), Yamazaki
patent: 2004/0266073 (2004-12-01), Yamasaki
patent: 2005/0011752 (2005-01-01), Yamazaki et al.
patent: 2005/0013927 (2005-01-01), Yamazaki
patent: 2005/0064091 (2005-03-01), Yamazaki
patent: 2005/0090029 (2005-04-01), Yamazaki et al.
patent: 2005/0167404 (2005-08-01), Yamazaki et al.
patent: 1-340-838 (2003-09-01), None
patent: 06-202153 (1994-07-01), None
patent: 07-024579 (1995-01-01), None
patent: 09-320363 (1997-12-01), None
patent: 11-340129 (1999-12-01), None
patent: 11-340129 (1999-12-01), None
patent: 2000-169977 (2000-06-01), None
patent: 2001-068827 (2001-03-01), None
patent: 2001-093871 (2001-04-01), None
patent: 2001-179167 (2001-07-01), None
patent: 2002-066391 (2002-03-01), None
patent: 2002-151478 (2002-05-01), None
patent: 2002-27480 (2002-08-01), None
patent: 2002-237463 (2002-08-01), None
patent: 2002-237480 (2002-08-01), None
patent: 2002-289864 (2002-10-01), None
patent: 2002-324966 (2002-11-01), None
patent: 2002-359246 (2002-12-01), None
patent: 2002-359347 (2002-12-01), None
patent: 2003-017413 (2003-01-01), None
patent: 2003-311197 (2003-11-01), None
patent: 2003-347284 (2003-12-01), None
patent: WO-01-47044 (2001-06-01), None
patent: WO-02-40742 (2002-05-01), None
patent: WO-2004/070809 (2004-08-01), None
patent: WO-2004/070810 (2004-08-01), None
patent: WO-2004-070811 (2004-08-01), None
patent: WO-2004-070819 (2004-08-01), None
patent: WO-2004/070820 (2004-08-01), None
patent: WO-2004-070821 (2004-08-01), None
patent: WO-2004-070822 (2004-08-01), None
patent: WO-2004-070823 (2004-08-01), None
Wolf et al., Silicon Processing for the VLSI Era, 1986, Lattice Press, vol. 1, pp. 198, 408, 427, 539, 542, 535.
International Search Report (Application No. PCT/JP2004/000897) and Written Opinion dated Apr. 27, 2004 with partial translation of Written Opinion.
International Search Report (Application No. PCT/JP2004/000899) and Written Opinion dated Apr. 27, 2004 with partial translation of Written Opinion.
International Search Report (Application No. PCT/JP2004/000900) and Written Opinion dated Jun. 1, 2004 with partial translation of Written Opinion.
International Search Report (Application No. PCT/JP2004/000915) and Written Opinion dated Apr. 27, 2004 with partial translation of Written Opinion.
International Search Report (Application No. PCT/JP2004/000918) and Written Opinion dated Apr. 27, 2004 with partial translation of Written Opinion.
International Search Report (Application No. PCT/JP2004/000930) and Written Opinion dated Apr. 13, 2004 with partial translation of Written Opinion.
International Search Report (Application No. PCT/JP2004/000932) and Written Opinion dated Apr. 6, 2004 with partial translation of Written Opinion.
International Search Report (Application No. PCT/JP2004/000897) Dated Apr. 27, 2004 (In Japanese).
Written Opinion (Application No. PCT/JP2004/000897) Dated Apr. 27, 2004.
International Search Report (Application No. PCT/JP2004/000899) dated Apr. 27, 2004 with Partial Translation.
International Search Report (Application No. PCT/JP2004/000900) and Written Opinion dated Jun. 1, 2004 with Partial Translation.
International Search Report (Application No. PCT/JP2004/000932) dated Apr. 6, 2004 with Partial English Translation.
International Search Report (Application No. PCT/JP2004/000895) and Written Opinion dated Apr. 27, 2004 with Partial Translation.

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