Manufacturing method for strained silicon wafer

Details Manufacturing method for strained silicon wafer Manufacturing method for strained silicon wafer

2007-07-31

2007-07-31

Smith, Matthew (Department: 2823)

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

C438S503000, C438S507000, C257S190000, C257S192000

Reexamination Certificate

active

11220983

ABSTRACT:
A manufacturing method for producing a stained silicon wafer has the steps of forming an Si1-xGexcomposition-graded layer of which Ge concentration is stepwisely increased on a single crystal silicon substrate, forming an Si1-xGexuniform composition layer of which Ge concentration is constant on the Si1-xGexcomposition-graded layer, forming a stain-relaxed Si1-yGeylayer of which Ge concentration y is constant while y satisfies relationship of 0.5x≦y<x on the Si1-xGexuniform composition layer and epitaxially growing a strained Si layer on the strain-relaxed Si1-yGeylayer.

REFERENCES:
patent: 5221413 (1993-06-01), Brasen et al.
patent: 2004/0005740 (2004-01-01), Lochtefeld et al.
patent: 2005/0023646 (2005-02-01), Lee et al.
patent: 2792785 (1998-06-01), None
patent: 2002-118254 (2002-04-01), None
patent: 2003-197544 (2003-07-01), None
patent: WO 2005078786 (2004-01-01), None
Kidd et.al , “Comaparison of the crystalline quality of step-graded and continuosly graded InGaAs buffer layers”,),Jun. 14, 1996, Journal of Crystal Growth 169(1996),649-659.

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