Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-08-22
1999-06-22
Chaudhuri, Olik
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
257306, H01L 218242, H01L 2700
Patent
active
059151897
ABSTRACT:
A method for forming a storage electrode having increased area in a highly-integrated semiconductor device. In the method, a trench is formed in a thick insulating interlayer deposited on a semiconductor substrate. Hemispherical grains are formed on the surface of the trench to increase the surface area of the trench. A conductive layer for forming a storage electrode is formed in the surface of the trench. The conductive layer is patterned with a CMP process or etch back process to form a storage electrode. Forming a capacitor dielectric film over the electrode and a plate electrode over the film completes the process.
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patent: 5340763 (1994-08-01), Dennison
patent: 5381365 (1995-01-01), Ajika et al.
"Hemispherical Grained Si Formation on in-situ Phosphorous Doped Amorphous-Si Electrode for 256Mb DRAM's Capacitor," by Hirohito Watanabe et al., IEEE Transactions on Electron Devices, vol. 42, No. 7, Jul. 1995, pp. 1247-1254.
Chaudhuri Olik
Coleman William David
Samsung Electronics Co,. Ltd.
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