Manufacturing method for semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S637000, C257SE21579

Reexamination Certificate

active

07576001

ABSTRACT:
A semiconductor device manufacturing method for suppressing surface roughness of a Low-k insulating film during etching. In a laminated structure comprising a layer having formed thereon a lower copper wiring, a SiC film and a SiOC film, a via and an upper copper wiring are formed as follows. The SiOC film is etched to form a via hole opening that reaches the SiC film and then to form wiring grooves that communicate with the opening. Thereafter, when the SiC film on the bottom of the opening is etched to form a via hole, a deposited film of etching products is formed on surfaces of the via hole and the wiring grooves. This deposited film allows planarization of the SiOC film surface, which is exposed to plasma, formed thereon the via hole and the wiring grooves. Subsequently, formation of a Ta film and burying of plating copper are performed.

REFERENCES:
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patent: 6784105 (2004-08-01), Yang et al.
patent: 6809028 (2004-10-01), Chen et al.
patent: 7135402 (2006-11-01), Lin et al.
Patent Abstracts of Japan, Publication No. 2004-071731, dated Mar. 4, 2004.
Patent Abstracts of Japan, Publication No. 2004-071856, dated Mar. 4, 2004.

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