Manufacturing method for semiconductor chips

Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure

Reexamination Certificate

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C438S033000, C438S068000, C438S113000, C438S114000, C438S458000, C438S464000, C438S463000, C438S461000, C438S460000, C438S465000, C257SE21214

Reexamination Certificate

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07871901

ABSTRACT:
A method of manufacturing semiconductor chips including forming dividing-groove portions in accordance with dividing regions on the second surface of a semiconductor wafer where an insulating film is placed in the dividing regions of the first surface and performing etching of the entire second surface and the surfaces of the dividing-groove portions by performing plasma etching from the second surface. Thereby corner portions on the second surface side are removed, while the insulating film is exposed from the etching bottom portion by removing the dividing-groove portions in the dividing regions. Also, by continuously performing the plasma etching in a state in which the exposed insulating film is surface charged with electric charge due to ions in plasma, corner portions on in contact with the insulating film on the first surface side are removed, and semiconductor chips that have a high transverse rupture strength are provided.

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patent: 2004/0102025 (2004-05-01), Arita
patent: 2005/0072766 (2005-04-01), Arita
patent: 2004-172365 (2004-06-01), None
Patent Cooperation Treaty (PCT) International Preliminary Report on Patentability, issued Oct. 23, 2007.
International Search Report issued Jul. 7, 2006 in the International (PCT) Application of which the present application is the U.S. National Stage.
PCT Written Opinion of the International Searching Authority (in English language), issued in International Application No. PCT/JP2006/308479.

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