Manufacturing method for self-aligned local interconnects and co

Details Manufacturing method for self-aligned local interconnects and co Manufacturing method for self-aligned local interconnects and co

1998-03-05

1999-05-04

Brown, Peter Toby

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438233, 438637, 438630, 438649, 148DIG19, H01L 2144

Patent

active

058997423

ABSTRACT:
The invention provides a novel method, in which self-aligned, borderless contacts and local interconnections of semiconductor devices are manufactured in an integral process. The method is compatible with the LOGIC self-aligned titanium silicide (SALICIDE) and N+/P+ poly dual gate process modules. That is, this invention provides a self-aligned local-interconnect and contact (SALIC) method for a logic technology to forming the self-aligned, borderless contacts, and local interconnects (LI) simultaneously.

REFERENCES:
patent: 5668065 (1997-09-01), Lin
patent: 5674781 (1997-10-01), Huang et al.
patent: 5759889 (1998-06-01), Sakao
patent: 5807779 (1998-09-01), Liaw

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