Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2001-02-20
2002-11-19
Christianson, Keith (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
Reexamination Certificate
active
06482682
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a manufacturing method of polysilicon thin film transistors and, more particularly, to a manufacturing method for improving the reliability of polysilicon thin film transistors.
2. Related Art
The invention of transistors have produced revolutionary influence on the electronic industry and greatly changed human life. Thin film transistors are a type of very important semiconductor elements. According to the manufacturing processes, the thin film transistors can be classified into amorphous silicon thin film transistors and polysilicon thin film transistors. Since the defects in the amorphous thin film transistors will affect the electron mean free path, the electron mobility speed is slower, whereas that of the polysilicon transistor is about 100 times faster. Therefore, polysilicon thin film transistors have slowly become the trend of thin film transistors and have been widely used in the driving circuits for liquid crystal displays (LCDs).
FIGS. 1A and 1B
show a schematic cross-sectional structure of a metal oxide semiconductor (MOS) thin film transistor. A polysilicon layer
2
is formed on a glass substrate
1
. The polysilicon layer
2
has two heavily doped n
−
regions
3
,
4
, corresponding to a source
5
and a drain
6
, respectively. An insulation layer
7
is formed on the glass substrate
1
and the polysilicon layer
2
with only the two heavily doped n regions
3
,
4
exposed as the contact windows to the source
5
and the drain
6
. A gate
8
is formed on the polysilicon layer
2
between the two n
−
regions
3
,
4
. Between the gate
8
and the polysilicon layer
2
is sandwiched with gate oxide
9
. In the manufacturing process, the polysilicon layer
2
is a polycrystalline structure formed by re-crystallization from an amorphous silicon layer. Therefore, bumps
11
will form at the grain boundary
10
and thus increase the roughness on the polysilicon layer
2
. As the operation voltage at the bate of the polysilicon thin film transistor is fairly high and the gate oxide
9
is relatively thin, it is very likely to have electricity leaking at the bumps
11
if the polysilicon layer
2
is too rough, resulting in ineffectiveness of the thin film transistor and lowered reliability of polysilicon thin film transistors.
In view of the foregoing, it is highly desirable to provide a manufacturing method for improving the reliability of polysilicon thin film transistors that can avoid the above problems.
SUMMARY OF THE INVENTION
It is an object of the invention to solve the electricity leaking problem due to very rough polysilicon layer surface in polysilicon thin film transistors by providing a new manufacturing method to improve the reliability of polysilicon thin film transistors.
Pursuant to the above object, the disclosed method oxidizes a polysilicon layer deposited on a substrate to produce a silicon oxide layer in the polysilicon thin film transistor manufacturing process. An etching solution is further employed to remove the silicon oxide layer so as to planarize bumps produced in the re-crystallization on the polysilicon layer surface, thus effectively decreasing the roughness of the polysilicon layer surface.
The disclosed manufacturing method for improving the reliability of polysilicon thin film transistors at least includes the following steps of: providing a substrate; forming a polysilicon layer on the substrate; oxidizing the polysilicon layer surface to produce a silicon oxide layer; etching away the silicon oxide layer in order to planarize the polysilicon layer surface; and completing a thin film transistor on the planarized polysilicon layer which is taken as the active layer of the thin film transistor.
In the above method, the step of oxidizing the polysilicon layer surface can be performed by generating ozone from ozone water or using excimer UV light. Furthermore, one can also radiate the polysilicon layer surface in an O
2
atmosphere using a lamp to provide oxidation free energy for speeding up the polysilicon layer surface oxidation. Such methods include the rapid thermal annealing (RTA) and low energy excimer laser. The step of etching away the silicon oxide layer can be done by using a proper etching solution such as the DHF, BOE solutions.
After the polysilicon layer surface planarization by oxidation and etching, taking the resulting polysilicon layer as an active layer for the thin film transistor can form a highly reliable polysilicon thin film transistor by employing conventional photolithography, etching and doping, vapor phase deposition (VPD), etc.
REFERENCES:
patent: 5395804 (1995-03-01), Ueda
patent: 5926701 (1999-07-01), Li
Sun Jeng-Hung
Wang Wen-Tung
Christianson Keith
Industrial Technology Research Institute
Liauh W. Wayne
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