Manufacturing method for BiCMOS devices

Details Manufacturing method for BiCMOS devices Manufacturing method for BiCMOS devices

1991-04-29

1991-12-31

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 47, 437 52, 437 59, 437 44, H01L 2170

Patent

active

050772260

ABSTRACT:
The present invention relates to a method for manufacturing BiCMOS device. The emitter of bipolar transistor and the load resistors of CMOS transistors are formed in such a manner that the amorphous silicon layer is formed at a low temperature in order to prevent an oxide layer from forming on the exposed base region and then the ion impurities are implanted into this region so as to be annealed and oxidized, where the ion impurities are not implanted into the load resistor portion. Thus, any oxide layer is scarcely formed between the emitter region and polysilicon layers. And the resistance becomes substantially low since the amorphous silicon layer is changed to the polysilicon layer with large grains and the emitter region is formed by diffusing the ion impurities.
In addition, the polysilicon layer for the load resistors of CMOS transistors is intrinsic and has large grain, thereby making the resistance value high. Accordingly, the present invention can improve the operating speed by the low emitter resistance of the bipolar transistor and can minimize the power consumption by the reduction of the leakage current due to the high load resistance of the CMOS transistors.

REFERENCES:
patent: 4214917 (1980-07-01), Clark et al.
patent: 4637125 (1987-01-01), Iwasaki et al.
patent: 4921811 (1990-05-01), Watanabe et al.

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