Manufacturing method for a semiconductor isolation region

Details Manufacturing method for a semiconductor isolation region Manufacturing method for a semiconductor isolation region

1993-09-27

1994-11-01

Fourson, George

Fishing, trapping, and vermin destroying

437 72, 437 69, H01L 2176

Patent

active

053607538

ABSTRACT:
In an element isolation method of a semiconductor device which can form an element isolation region having a flat surface without regard to the width of the element isolation region, and whose width is below the resolution limit, an insulating film having an aperture in order to define the element isolation region is formed on the semiconductor wafer, wherein an oxidizable material layer is deposited and then first spacers are formed on the sidewalls of the aperture. Then, a thermal oxide film is formed over the entire semiconductor wafer, excluding a first-spacer-formed region, and the first spacer is removed. The wafer surface is exposed to the lower part of the removed first spacer region, and then the portion of the semiconductor wafer below the exposed region is etched to thereby form a trench. After that, an element isolation region is formed by filling up the trench and removing the insulating film around tile trench. Additionally, a second spacer is formed on the sidewalls of the first spacer so as to further reduce the element isolation region. Accordingly, a highly integrated semiconductor device can be accomplished by forming an element isolation region whose size is below the resolution limit and whereby good element isolation characteristics are provided.

REFERENCES:
patent: 5004703 (1991-02-01), Zdeble et al.
patent: 5096848 (1992-03-01), Kawamura

Affiliated with

Also associated with

Rating

Manufacturing method for a semiconductor isolation region does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Manufacturing method for a semiconductor isolation region, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacturing method for a semiconductor isolation region will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1802200