Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2001-02-01
2002-05-14
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S164000, C438S404000
Reexamination Certificate
active
06387741
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to a method for manufacturing a semiconductor device wherein isolated circuit-element formation layers with different thicknesses are located on an insulating layer, and especially relates to a method for manufacturing a semiconductor device wherein silicon layers having different thicknesses in an SOI (Silicon-On-Insulator) structure are isolated.
BACKGROUND ART
In circuit elements of an SOI structure, in the case of forming a bipolar transistor and a MOSFET, are formed on the same insulating substrate, and to form several MOSFETs having different thresholds thereon a technique is used whereby silicon regions having different thicknesses are formed, as is disclosed in Japanese Patent Application Laid-open No. 7-106579 (1995).
Isolation of the elements is accomplished by selectively oxidizing circuit-element formation layers to form field oxide films. However, in the case of an SOI substrate, at edge parts where the field oxide film and the circuit-element formation region are in contact with each other, impurities of the circuit element formation part, for example, BF2+ ions, diffuse into the field oxide film, whereby the impurity concentration of the edge part becomes lower than that of other regions removed from the edge parts. As a result, leak current occurs at the edge parts where the field oxide film and the circuit-element formation region are in contact with each other.
Therefore, it is necessary to remove the field oxide films and inject impurities for preventing leakage into the edge parts.
A method for manufacturing a semiconductor device in which silicon layers having different thicknesses are isolated will be described referring to
FIG. 3A
to FIG.
3
C.
In this conventional example, in order to isolate the circuit elements, the field oxide films are temporarily formed and then these field oxide films are removed.
In the process of
FIG. 3A
, first, silicon film layers
2
having different thicknesses are formed on a silicon oxide layer
1
, and a silicon oxide (SiO
2
) layer
3
is deposited thereon.
Furthermore, a silicon nitride (Si
3
N
4
) layer
4
is deposited, by means of the LP (Low Pressure) CVD method, on the silicon oxide layer
3
. Following this, the silicon nitride layer
4
is masked with a resist and patterned to a predetermined form.
Next, in the process of
FIG. 3B
, the silicon nitride layers
4
are used as a mask and selective wet-oxidization is performed. By this wet-oxidization, field silicon oxide layers
5
a
,
5
b
having different thicknesses are formed.
Next, in the process of
FIG. 3C
, by using an etching liquid (etchant) in which hydrofluoric acid (HF) and water are mixed to a ratio of 1 to 19, wet etching on the field silicon oxide layers
5
a
,
5
b
is performed, so that boundary portions between the silicon oxide layer
1
and the silicon film layer
2
are exposed. As a result, isolated circuit elements, namely, silicon film layers
2
a
,
2
b
, are formed having different film thicknesses.
However, in the case of etching the field silicon oxide layers
5
a
,
5
b
, the silicon oxide layer
1
that was made of the same material as the field silicon oxide layers
5
a
,
5
b
may also be etched.
That is, when the silicon film layers
2
a
,
2
b
, each of which was part of silicon film layer
2
and comprised of different thickness, are isolated, the thickness of each of the field silicon oxide layers
5
a
,
5
b
becomes proportional to the thickness of the silicon film layer
2
for oxidation.
Consequently, in the wet etching process as shown in
FIG. 3C
, if the wet etching with an adjusted etching time for the field silicon oxide layer
5
a
comprised of a thick film thickness is performed, even the silicon oxide layer
1
that exists bellow the field silicon oxide layer
5
b
comprised of a thin film thickness is etched, forming hollows. Those hollows are underetchings that reach down to an underside of the silicon film layer
2
b
, and then an element formed on the silicon film layer
2
b
becomes insufficient structure.
DISCLOSURE OF THE INVENTION
An object of the present invention is to provide a method for manufacturing a semiconductor device that has no hollows of a under layer comprising the approximate same material as the field oxide film, thus increasing the yield of the semiconductor device and improving reliability.
There is provided a method of manufacturing a semiconductor device for isolating circuit-element formation layers comprised of different thicknesses on an insulating layer, comprising the processes of: forming a plurality of circuit-element formation layers each of which is partitioned by steps and comprised of a different film thickness on the insulating layer; forming an antioxidation film on each region according to the circuit-element formation layer comprised of the different film thickness; oxidizing the circuit-element formation layers by using the antioxidation film as a mask to form field oxide films comprised of different thicknesses between the circuit-element formation layers; implanting ions only into the field oxide films comprised of a thick film thickness among the field oxide films comprised of different thicknesses; and etching concurrently the field oxide films comprised of different thicknesses.
Here, a substrate after the ion implantation may be annealed at a temperature not less than 900° C.
The insulating layer may be silicon oxide, the circuit-element formation layer may be a silicon layer, and the field oxide film may be silicon oxide film.
The insulating layer may be formed on a silicon substrate.
The antioxidation film may be silicon nitride.
The ion species for the implanting process may be one of boron fluoride (BF+2), argon (Ar+), arsenic (As+), and phosphorus (P+).
The process of etching the field oxide film may be wet etching with the use of an etching liquid of a mixture of hydrofluoric acid (HF) and water.
The process of forming the plurality of circuit-element formation layers, each of which is partitioned by the steps and comprised of the different film thickness on the insulating layer, may comprise the processes of: preparing a substrate such that an insulating layer may be formed thereon and a silicon layer whose thickness may be approximately uniform may be formed on the insulating layer, and forming the antioxidation film on the silicon layer according to a region where its film thickness is thick; selectively oxidizing the silicon layer according to a region where its film thickness may be thin by using the antioxidation film as a mask and oxidizing the surface of the thin film thickness region so that a thin silicon layer may remain existing; etching an oxide film formed by the oxidizing process; and removing the antioxidation film.
The antioxidation film may be silicon nitride.
The thin oxide film may be formed between the silicon layer and the antioxidation film.
The process may include implanting an ion into an edge part of the circuit-element formation layer that are newly exposed by etching after the process of etching the field oxide films comprised of different thicknesses.
The process may include implanting an ion for adjusting a threshold value of an MOS transistor.
REFERENCES:
patent: 5279978 (1994-01-01), See et al.
patent: 5463238 (1995-10-01), Takahashi et al.
patent: 2001/0005030 (2001-06-01), Imai
patent: 54-61488 (1979-05-01), None
patent: 57-196543 (1982-12-01), None
patent: 63-177564 (1988-07-01), None
patent: 07-106579 (1995-04-01), None
Asahi Kasei Microsystems Co. Ltd.
Bowers Charles
Smoot Stephen W.
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