Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-03-09
2010-11-09
Rossoshek, Helen (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07831945
ABSTRACT:
A method of designing a clock distribution network in an integrated circuit, the method including: creating a clock distribution network with all cells having a maximum drive strength; supplying parameters of the clock distribution network to a timing analysis tool; in the timing analysis tool, analyzing the timing of the clock distribution network in an iterative process including manipulating the drive strength of at least one cell in the clock distribution network and assessing whether there is an improvement in the timing, wherein the iterative process ceases where there is no improvement in the timing; and outputting a list of cells for which the drive strength was changed.
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Jorgenson Lisa K.
Morris James H.
Rossoshek Helen
STMicroelectronics (R&D) Ltd.
Wolf Greenfield & Sacks P.C.
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