Manufacture method of metal bottom ARC

Details Manufacture method of metal bottom ARC Manufacture method of metal bottom ARC

2001-11-07

2003-06-03

Goudreau, G (Department: 1763)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C430S005000, C438S717000, C438S736000, C427S569000

Reexamination Certificate

active

06573189

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to a method of photolithographic etching of metal lines, and more particularly, to a method of photolithographic etching of metal lines without photoresist footing in the manufacture of integrated circuits.
(2) Description of the Prior Art
In the manufacture of integrated circuit devices, an antireflective coating (ARC) layer is applied over a metal layer to be patterned underlying the photoresist material. The ARC layer improves photolithographic resolution. However, after development of the photoresist material, footings may form at the interface between the photoresist mask and the ARC layer.
FIG. 1
illustrates a metal layer
20
formed over an insulating layer
12
on a semiconductor substrate
10
. An ARC layer
25
overlies the metal layer. Photoresist mask
45
has footings
47
. The so-called footings form a sloped area at the surface of the ARC layer rather than the desired vertical photoresist sidewalls for best resolution. It is theorized that the resist footings are formed by the reaction between nitrogen in the ARC layer and the photoresist layer. N
2
O plasma treatment may be used to solve this problem. However, this solution requires extra processing time, an additional plasma treatment step, and reduced throughput.
U.S. Pat. No. 6,174,818 to Tao et al discloses a SiON ARC layer with an overlying sacrificial silicon oxide layer. Photoresist footings are optionally trimmed after development. U.S. Pat. No. 6,159,863 to Chen et al teaches a titanium or titanium nitride ARC layer with an overlying TEOS of SiON layer to prevent photoresist footing formation. U.S. Pat. No. 5,759,746 to Azuma et al uses an oxide/carbide ARC layer and overlying silicon dioxide layer to reduce footing. U.S. Pat. No. 5,866,302 to Matsuoka et al teaches the use of a reflowable ARC layer.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide an effective and very manufacturable method of etching metal lines.
Another object of the present invention is to provide a method of etching metal lines without photoresist footing.
A further object of the present invention is to provide a method of preventing photoresist footing using a novel ARC layer.
Yet another object of the present invention is to provide a method of preventing photoresist footing by forming a silicon oxynitride ARC layer having an oxygen-rich surface.
In accordance with the objects of this invention a new method of preventing photoresist footing by forming a silicon oxynitride ARC layer having an oxygen-rich surface is achieved. An insulating layer is provided on a substrate. A metal layer is deposited overlying the insulating layer. A silicon oxynitride antireflective coating layer having an oxygen-rich surface is deposited overlying the metal layer. A photoresist mask is formed overlying the antireflective coating layer wherein the antireflective coating layer prevents photoresist footing. The antireflective coating layer and the metal layer are etched away where they are not covered by the photoresist mask to complete formation of metal lines in the fabrication of an integrated circuit.


REFERENCES:
patent: 5759746 (1998-06-01), Azuma et al.
patent: 5831321 (1998-11-01), Nagayama
patent: 5866302 (1999-02-01), Matsuoka et al.
patent: 6051282 (2000-04-01), Konjuh et al.
patent: 6159863 (2000-12-01), Chen et al.
patent: 6174816 (2001-01-01), Yin et al.
patent: 6174818 (2001-01-01), Tao et al.
patent: 6218292 (2001-04-01), Foote
patent: 6326231 (2001-12-01), Subramanian et al.
patent: 6403151 (2002-06-01), Davis et al.
patent: 2002/0052127 (2002-05-01), Gau et al.

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