Managing resources in a bus bridge

Details Managing resources in a bus bridge Managing resources in a bus bridge

2000-03-31

2004-03-16

Thai, Xuan M. (Department: 2181)

Electrical computers and digital data processing systems: input/

Access arbitrating

C710S100000, C710S108000, C710S112000, C710S200000, C710S241000, C370S229000, C370S412000, C370S458000, C370S462000

Reexamination Certificate

active

06708240

ABSTRACT:

BACKGROUND
The invention relates to managing resources in a bus bridge.
A Peripheral Component Interconnect PCI bus, for example, may connect peripheral devices (“PCI masters”) such as CD-ROM drives, graphics accelerators and sound cards to other computer system components. Each master can send transaction requests, such as read and write requests, to main memory through the PCI bus.
Requests made from a PCI master to main memory must pass through a PCI host bridge, which can only accommodate a limited number of transactions due to finite internal buffer resources. When more than one device makes a request, the PCI host bridge acts as an arbiter and grants access to one or more of the PCI masters to increase use up to the limit of its resources.
The host bridge may use round-robin arbitration to grant access to requests in its buffer in first-in, first-out (FIFO) order.
In a conventional round-robin arbitration, aggressive PCI masters may make so many requests in a short time that all the buffer resources of the host bridge may be used before other devices can make a request. Even if a device resubmits its rejected request later, the request may be rejected repeatedly if the PCI resources are not available. Thus, a PCI master might have its requests rejected indefinitely and be effectively locked out, unable to send or receive data.


REFERENCES:
patent: 5239651 (1993-08-01), Sodos
patent: 5396602 (1995-03-01), Amini et al.
patent: 5438666 (1995-08-01), Craft et al.
patent: 5481680 (1996-01-01), Larson et al.
patent: 5499346 (1996-03-01), Amini et al.
patent: 5533204 (1996-07-01), Tipley
patent: 5689660 (1997-11-01), Johnson et al.
patent: 5758166 (1998-05-01), Ajanovic
patent: 5771359 (1998-06-01), Galloway et al.
patent: 5815677 (1998-09-01), Goodrum
patent: 5845096 (1998-12-01), Munguia et al.
patent: 5941964 (1999-08-01), Young et al.
patent: 5991833 (1999-11-01), Wandler et al.
patent: 6006303 (1999-12-01), Barnaby et al.
patent: 6072772 (2000-06-01), Charny et al.
patent: 6141715 (2000-10-01), Porterfield
patent: 6192471 (2001-02-01), Pearce et al.
patent: 6260095 (2001-07-01), Goodrum
patent: 6359900 (2002-03-01), Dinakar et al.
patent: 6466580 (2002-10-01), Leung

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