Managing mirrored memory transactions and error recovery

Details Managing mirrored memory transactions and error recovery Managing mirrored memory transactions and error recovery

2007-10-30

2008-12-30

Ellis, Kevin (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S154000, C711S158000, C711S168000

Reexamination Certificate

active

07472236

ABSTRACT:
In a data processing system having a memory control device including at least two mirrored memory ports, a method and computer-readable medium for processing read requests are disclosed herein. In accordance with the method of the present invention, a read request is received on a system interconnect coupling read requestors with memory resources. The received read request is issued only to a specified one of the at least two mirrored memory ports within the memory control device. In response to detecting an unrecoverable error resulting from the read request issued to the one mirrored memory port, the received read request is issued to an alternate of the at least two mirrored memory ports.

REFERENCES:
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patent: 2004/0093472 (2004-05-01), Dahlen et al.
patent: 2004/0221111 (2004-11-01), Phelps et al.

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