Managing a cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C711S120000, C711S129000

Reexamination Certificate

active

06604171

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This application relates to the field of computer data storage and more particularly to the field of using a cache memory in a computer data storage device.
2. Description of Related Art
Host processor systems may store and retrieve data using a storage device containing a plurality of host interface units, disk drives, and disk interface units. Such storage devices are provided, for example, by EMC Corporation of Hopkington, Mass. and disclosed in U.S. Pat. No. 5,206,939 to Yanai et al., U.S. Pat. No. 5,778,394 to Galtzur et al., U.S. Pat. No. 5,845,147 to Vishlitzky et al., and U.S. Pat. No. 5,857,208 to Ofek. The host systems access the storage device through a plurality of channels provided therewith. Host systems provide data and access control information via the channels of the storage device and the storage device provides data to the host systems also through the channels. The host systems do not address the disk drives of the storage device directly, but rather, access what appears to the host systems as a plurality of logical disk units. The logical disk units may or may not correspond to the actual disk drives.
Performance of such a storage system may be improved by using a cache. In the case of a disk drive system, the cache may be implemented using a block of semiconductor memory that has a relatively lower data access time than the disk drive. Data that is accessed is advantageously moved from the disk drives to the cache so that the second and subsequent accesses to the data may be made to the cache rather than to the disk drives. Data that has not been accessed recently may be removed from the cache to make room for new data. Often such cache accesses are transparent to the host systems requesting the data.
In instances where the host systems write data to the disk, it may be efficient to have the write operation initially occur only in the cache. The data may then be transferred from the cache back to the disk at a later time, possibly after subsequent read and write operations. Transferring the modified cache data to the disk is referred to as “destaging”.
If the cache memory fails after one or more write operations but prior to destaging the modified cache data to the disk, then the disk data may not match the data that was written by the host system. Such a situation may be especially troublesome in instances where the use of the cache is transparent to the host, i.e., in systems where the host system writes data and the write operation is acknowledged by the storage device (because the data is successfully written to the cache), but then the data is never appropriately transferred to the disk because of cache failure. Numerous solutions have been proposed to handle cache failures.
U.S. Pat. Nos. 5,437,022, 5,640,530, and 5,771,367, all to Beardsley et al, disclose a system having two, somewhat—independent, “clusters” that handle data storage. The clusters are disclosed as being designed to store the same data. Each of the clusters includes its disks own cache and non-volatile storage area. The cache from one of the clusters is backed up to the non-volatile data storage area of the other cluster and vice versa. In the event of a cache failure, the data stored in the corresponding non-volatile storage area (from the other cluster) is destaged to the appropriate disk. However, this system requires, in effect, a duplicate backup memory for each of the caches and also provides that whenever data is written to one of the caches, the same data needs to be written to the corresponding non-volatile storage in the other cluster. In addition, since each cluster includes a cache and a non-volatile storage, thus having two redundant clusters requires four memories (one cache for each of the clusters and one non-volatile storage for each of the clusters).
It is desirable to have a system that provides sufficient redundancy in the case of failure of a cache element without unduly increasing the complexity of the system or the number of elements that are needed.
SUMMARY OF THE INVENTION
According to the present invention, managing a cache memory includes using a first cache memory, copying data from the first cache memory to a second cache memory, and, following copying, using the second cache memory along with the first cache memory. Prior to using the second cache memory, data may be copied to the second cache memory in response to the data being provided from a disk storage area to the first cache memory. Copying data may include background copying the data during times when the cache memories are not otherwise being used. Using the second cache memory along with the first cache memory may include providing data from a disk storage area to a first cache memory, providing data from the disk storage area to a second cache memory, where the first and second cache memories contain at least some data that is different, and writing a portion of the data to both of the cache memories in response to the portion of data being modified while stored in the cache memories.


REFERENCES:
patent: 5206939 (1993-04-01), Yanai et al.
patent: 5319766 (1994-06-01), Thaller et al.
patent: 5390186 (1995-02-01), Murata et al.
patent: 5404500 (1995-04-01), Legvold et al.
patent: 5437022 (1995-07-01), Beardsley et al.
patent: 5640530 (1997-06-01), Beardsley et al.
patent: 5724501 (1998-03-01), Dewey et al.
patent: 5771367 (1998-06-01), Beardsley et al.
patent: 5778394 (1998-07-01), Galtzur et al.
patent: 5845147 (1998-12-01), Vishlitzky et al.
patent: 5857208 (1999-01-01), Ofek
patent: 6073209 (2000-06-01), Bergsten
patent: 6073251 (2000-06-01), Jewett et al.
patent: 6078503 (2000-06-01), Gallagher et al.
Patterson, David A. and John L. Hennessy, Computer Architecture: A Quantitative Approach, 1996, p. 462.*
Pierre Raymond and John Nguyen, “Hitachi Freedom Storage 7700E Turbo-charges DB2”, 1998, pp. 1-6.

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