Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-11-06
2007-11-06
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S214000, C711S217000, C711S218000
Reexamination Certificate
active
10449316
ABSTRACT:
Arbitrary patterns of address locations of digital data can be efficiently read from a memory of a signal processor. For example, a first memory address generator receives a first memory command signal from a first communication register to retrieve a first set of data from memory according to a look up table of memory addresses. The first memory access generator reads the look up table of memory addresses, which contain a second set of memory commands and reroutes the second set of commands to a bypass register. In turn, the second set of memory commands stored at the bypass register are read by a second memory address generator which retrieves a second set of data from memory according to the second set of memory command signals read out of memory by the first memory address generator.
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Mehta Kalpesh Dhanvantrai
Wang Wen-Shan
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Kim Matthew
Tsai Sheng-Jen
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