Majority voter circuit design

Details Majority voter circuit design Majority voter circuit design

2007-06-26

2007-06-26

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Threshold

With field-effect transistor

C326S011000, C326S104000

Reexamination Certificate

active

11053788

ABSTRACT:
A method and apparatus for performing majority voting is presented. The method selects pairs of inputs, performs AND and NOR operations on each pair of inputs to determine that each pair of inputs is both high or both low, yielding a quantity of “both high” pairs and a quantity of “both low” pairs, and compares the quantity of “both high” pairs against the quantity of “both low” pairs to determine the majority. The apparatus includes AND gates configured to receive pairs of values and NOR gates configured to receive the same pairs of values, with a connections between all AND gates and connections between all NOR gates. A summation element sums all AND gate outputs and all NOR gate outputs to determine the majority.

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