Majority logic circuit

Electronic digital logic circuitry – Threshold

Reexamination Certificate

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Details

C326S038000

Reexamination Certificate

active

07129742

ABSTRACT:
A novel majority logic circuit is disclosed to determine whether the majority of the inputs are a one, within a constant number of clock cycles, regardless of the number of inputs. The majority logic circuit according to the present invention includes a plurality of current mirror stages and an amplifier stage. For each input, one current mirror stage is used, which outputs either a current source if the input is a one, or a current sink if the input is a zero. The current sources of all the input current mirror stages are connected in parallel to the current source input node of the amplifier stage. The current sinks of all the input current mirror stages are connected in parallel to the current sink input node of the amplifier stage. The amplifier is a differential type, which outputs either a positive voltage or a zero voltage depending upon the majority of the inputs.

REFERENCES:
patent: 4091293 (1978-05-01), Ando
patent: 4692640 (1987-09-01), Suzuki et al.
patent: 4748594 (1988-05-01), Iida
patent: 5235220 (1993-08-01), Takizawa
patent: 5680408 (1997-10-01), Tsirkel
patent: 6320409 (2001-11-01), Nakajima et al.
patent: 6492842 (2002-12-01), Gendai

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