Maintaining shadow page tables in a sequestered memory region

Details Maintaining shadow page tables in a sequestered memory region Maintaining shadow page tables in a sequestered memory region

2005-07-27

2008-12-16

Sough, Hyung S (Department: 2188)

Electrical computers and digital processing systems: memory

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C711S207000, C718S001000, C726S004000, C726S017000, C726S026000, C726S030000

Reexamination Certificate

active

07467285

ABSTRACT:
Provided are a method, system, program and device for maintaining shadow page tables in a sequestered memory region. A first processor executing an application invokes a second processor to create a shadow page table used for address translation for the application in a sequestered memory region non-alterable by processes controlled by an operating system executed by the first processor. The shadow page table references at least one page in an operating system memory region accessible to processes controlled by the operating system.

REFERENCES:
patent: 2003/0105935 (2003-06-01), Moore
Barham et al. “Xen and the Art of Virtualization”. 2003. ACM Press. Proceedings of the nineteenth ACM symposium on Operating systems principles, pp. 164-177.

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