Maintaining packet order using hash-based linked-list queues

Details Maintaining packet order using hash-based linked-list queues Maintaining packet order using hash-based linked-list queues

2007-07-10

2007-07-10

Pham, Chi (Department: 2616)

Electrical computers and digital processing systems: memory

Storage accessing and control

C711S216000, C370S356000, C370S392000

Reexamination Certificate

active

10193212

ABSTRACT:
Ordering logic ensures that data items being processed by a number of parallel processing units are unloaded from the processing units in the original per-flow order that the data items were loaded into the parallel processing units. The ordering logic includes a pointer memory, a tail vector, and a head vector. Through these three elements, the ordering logic keeps track of a number of “virtual queues” corresponding to the data flows. A round robin arbiter unloads data items from the processing units only when a data item is at the head of its virtual queue.

REFERENCES:
patent: 6260115 (2001-07-01), Permut et al.
patent: 6564302 (2003-05-01), Yagi et al.
patent: 6772300 (2004-08-01), Manseau
patent: 6848017 (2005-01-01), MacEachern et al.
patent: 7180887 (2007-02-01), Schwaderer et al.

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