Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2005-08-01
2008-03-18
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S227000, C323S364000
Reexamination Certificate
active
07345931
ABSTRACT:
A method and circuit for controlling an output reference voltage generated by a reference voltage generator disposed on a memory device are provided. A signal for enabling a clocked standby mode of the memory device is received. If the signal indicates that the memory device is in the clocked standby mode, a first reference voltage is generated as the output reference voltage of the reference voltage generator using a first voltage. If the signal indicates that the memory device is not in the clocked standby mode, a second reference voltage is generated as the output reference voltage of the reference voltage generator using a second voltage.
REFERENCES:
patent: 6344992 (2002-02-01), Nakamura
patent: 6359809 (2002-03-01), Tedrow et al.
patent: 6754111 (2004-06-01), Pekny
patent: 7046576 (2006-05-01), Kim et al.
patent: 2004/0027866 (2004-02-01), Pekny
patent: 2004/0245979 (2004-12-01), Ikoma et al.
Alexander George
Heilmann Ben
Herbert David
Partsch Torsten
Patterson & Sheridan L.L.P.
Tran Anthan T
Zarabian Amir
LandOfFree
Maintaining internal voltages of an integrated circuit in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Maintaining internal voltages of an integrated circuit in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Maintaining internal voltages of an integrated circuit in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3975703