Main-board without restriction on memory frequency and...

Details Main-board without restriction on memory frequency and... Main-board without restriction on memory frequency and...

2005-05-11

2008-11-18

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Clock control of data processing system, component, or data...

C713S500000

Reexamination Certificate

active

07454651

ABSTRACT:
A main-board comprises a CPU, a chipset and a clock-rate control-signal generating module. The chipset has at least a phase-locked circuit, a CPU-bus circuit and a memory-bus circuit. The phase-locked circuit is electrically connected to the CPU-bus circuit and the memory-bus circuit. The CPU-bus circuit is electrically connected to the CPU. The clock-rate control-signal generating module generates a clock-rate control signal and is electrically connected to the CPU and the chipset. The clock-rate control signal is transmitted to the phase-locked circuit of the chipset. The phase-locked circuit resets the ratio of the information-transmitting frequency of the CPU-bus circuit to the information-transmitting frequency of the memory-bus circuit in accordance with the clock-rate control signal.

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patent: 7096377 (2006-08-01), Kumar et al.
patent: 2003/0204762 (2003-10-01), Lee et al.

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