Magnitude and group delay shaping circuit in continuous-time...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

Reexamination Certificate

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Details

C327S553000

Reexamination Certificate

active

06184748

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to analog integrated circuits. More specifically, a low power, high performance circuit for magnitude and group delay shaping in continuous-time read channel filters is disclosed.
2. Description of Related Art
High-frequency continuous-time filters are primarily used in mixed-signal integrated circuits for anti-aliasing and reconstruction functions. In hard disk drive applications, continuous-time filters, also referred to as read channel filters, provide channel equalization via magnitude and group delay shaping. Equalization in analog domain is advantageous in terms of power, die size, reduced clock latency and optimized dynamic range for the analog-to-digital converter, while equalization in digital domain offers programmability and architectural flexibility. Current state of the art read channel filters realize seventh order linear phase responses to provide up to 13 dB of magnitude boost, i.e., increase in magnitude without a change in phase, and approximately 30% group delay shaping for a maximum unboosted filter cut-off frequency F
c
of about 70 MHz to support data rates of up to 250 Mbps.
Filter magnitude and group delay shaping are important functions in continuous time filters, such as in read signal equalization, video signal conditioning, cable equalizers, etc. Specifically, in disk-drive applications, the readback signal has traditionally been pulse slimmed in time domain in order to mitigate the undesirable effects of intersymbol interference, a phenomenon that occurs due to close spacing of adjacent bits.
FIG. 1
shows a readback signal with and without pulse slimming in the time domain. Pulse slimming is generally equivalent to accentuating the mid-to-high frequency region of the read pulse spectrum, or a magnitude boost in an appropriate frequency band. Pulse slimming should not distort the group delay and hence the boost is also referred to as symmetric boost.
In the frequency domain, pulse slimming is equivalent to shaping the magnitude as a function of frequency.
FIG. 2
shows a readback signal with and without pulse slimming in the frequency domain. Specifically, curve
20
represents a traditional unboosted low pass response and curve
22
represents a boosted magnitude which is well defined as a function of frequency.
Although the problem of intersymbol interference (“ISI”) has been exacerbated in high density and high speed disk-drives, the availability of powerful digital signal processing (“DSP”) techniques enable the detection of readback signals reliably and efficiently. However, this detection process typically demands increasing amounts of boost, exceeding 13 dB relative to the unboosted value at the lowpass corner frequency.
In addition to magnitude shaping, the phase response or group delay of the readback signal is optionally conditioned to compensate for the nonlinear phase responses, of circuits, caused by finite bandwidth and DC offset-cancellation needs. Group delay shaping, also referred to as asymmetric boost, is different from magnitude shaping or symmetric boost.
FIG. 3
shows effects of modifying the group delay as a function of frequency when compared to a nominally flat group delay of the read channel filter. Specifically, curve
30
shows a nominally flat group delay of the read channel filter while curves
32
,
34
,
36
, and
38
show the effects of modifying the group delay to various extents as a function of frequency. As is evident from the graph of
FIG. 3
, with data rates increasing to 1 Gbps, as much as 40% of the group delay compensation may be required.
Increases in the hard disk drive data rates increase the user bit density, which in turn imposes more stringent requirements on magnitude and group delay equalization. Thus, a circuit that is both power and die-area efficient to achieve magnitude and group delay shaping for high data rate read channel filters is highly desired.
SUMMARY OF THE INVENTION
A low power, high performance circuit for magnitude and group delay shaping in continuous-time read channel filters is disclosed. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, or a method. Several inventive embodiments of the present invention are described below.
The magnitude and group delay shaping circuit generally comprises a first and a second biquadratic circuit, each having an input, a band pass, and an output low pass node, where the second biquadratic input node is coupled to the first biquadratic output low pass node, and first and second transconductors coupled to the first biquadratic band pass node and also to the second biquadratic band pass and low pass output nodes, respectively. The first and second transconductors are preferably programmable transconductors.
In a preferred embodiment, the first and second biquadratic circuits are unboosted and boosted biquadratic circuits, respectively. Each of the first and second biquadratic circuits optionally includes a plurality of transconductors. The first biquadratic transconductor is coupled to the first biquadratic band pass node and at least one of which is further coupled to one of the first biquadratic input node and output low pass nodes. Each of the second biquadratic transconductors is coupled to at least one of the second biquadratic band pass, low pass output, and input nodes. Each of the first and second biquadratic circuits may further include a band pass and a low pass capacitor, coupled to the band pass and low pass nodes, respectively, of the corresponding biquadratic circuit.
In another embodiment, a method for providing magnitude boost and group delay shaping comprises providing a first and a second biquadratic circuit each having an input, a band pass, and an output low pass node, where the second biquadratic input node is coupled to the first biquadratic output node, and selecting a first and second transconductance of a first and a second transconductor, respectively, where the first and second transconductors are coupled to the first biquadratic band pass node and also to the second biquadratic band pass and low pass output nodes, respectively.
These and other features and advantages of the present invention will be presented in more detail in the following detailed description and the accompanying figures which illustrate by way of example the principles of the invention.


REFERENCES:
patent: 5357208 (1994-10-01), Nelson
patent: 5525928 (1996-06-01), Asakawa
patent: 5736909 (1998-04-01), Hauser et al.
patent: 5812009 (1998-09-01), Matsuura
patent: 5898532 (1999-04-01), Du et al.
patent: 6069522 (2000-05-01), Venkatraman et al.
Cideciyan, Roy D.; Dolivo, Francois; Hermann, Reto; Hirt, Walter, “A PRML System for Digital Magnetic Recording”, Jan. 1, 1992, IEEE Journal on Selected Areas in Communications.

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