Magnetoresistive random access memory with improved layout...

Details Magnetoresistive random access memory with improved layout... Magnetoresistive random access memory with improved layout...

2011-03-22

2011-03-22

Pham, Thanh V (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S048000, C438S295000

Reexamination Certificate

active

07910969

ABSTRACT:
A MRAM memory and process thereof is described. A GMR magnetic layer is patterned to form a memory bit layer and an intermediate conductive layer. The intermediate conductive layer is disposed between two conductive layers such that shallow metal plugs can be utilized to interconnect the intermediate conductive layer and the conductive layers. Thus, a conventional deep tungsten plug process, interconnecting two conductive layers, is eliminated.

REFERENCES:
patent: 2005/0270831 (2005-12-01), Witcraft et al.
patent: 2006/0102970 (2006-05-01), Butcher et al.
patent: 2006/0202291 (2006-09-01), Kolb et al.

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