Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-04-22
2004-09-28
Elms, Richard (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S421000, C438S003000
Reexamination Certificate
active
06798004
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to magnetoelectronic devices, and more particularly relates to memory cell structures and methods for fabricating memory cell structures for magnetoresistive random access memory devices wherein the memory cell structures utilize a contact to an underlying conductive layer for a memory element wherein the contact partially bounds a programming line.
BACKGROUND OF THE INVENTION
Magnetoelectronics devices, spin electronics devices and spintronics devices are synonymous terms for devices that use the effects predominantly caused by electron spin. Magnetoelectronics effects are used in numerous information devices, and provide non-volatile, reliable, radiation resistant, and high-density data storage and retrieval. Magnetoresistive random access memory (MRAM) devices are well-known magnetoelectronics information devices.
The architecture for MRAM devices is composed of an array of memory cells. Each memory cell comprises a memory element (e.g., a giant magnetoresistance (GMR) element or a magnetic tunnel junction (MTJ) element) in electrical communication with a transistor through an interconnect stack. The memory elements are programmed by the magnetic field created from current-carrying conductors. Typically, two current-carrying conductors, the “digit line” and the “bit line”, are arranged in cross point matrix to provide magnetic fields for programming of the memory element. Because the digit line is formed underlying the memory element so that the memory element may be magnetically coupled to the digit line, the interconnect stack that couples the memory element to the transistor typically is formed, using standard CMOS processing, offset from the memory element. Such a configuration may consume valuable real estate in the MRAM device.
Accordingly, it is desirable to provide a method for fabricating a compact magnetoresistive random access memory cell. In addition, it is desirable to provide a structure and a method for improving the density of MRAM cells in a memory array by reducing the area of individual MRAM cells. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.
REFERENCES:
patent: 5734605 (1998-03-01), Zhu et al.
patent: 6165803 (2000-12-01), Chen et al.
patent: 6365419 (2002-04-01), Durlam et al.
patent: 6555858 (2003-04-01), Jones et al.
Butcher Brian R.
Durlam Mark A.
Grynkewich Gregory W.
Tracy Clarence J.
Elms Richard
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz PC
Smith Brad
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